First off, I am using Kamikaze 7.06, with Linux kernel 2.6.19.2. Yes, I know, this is a WhiteRussian based forum, but there doesn't seem to be a devel thread for Kamikaze - and I would assume the principles apply to either.

It's running on a modified La Fonera (I installed 32MB of SDRAM in lieu of the original 16MB) I have wired jumpers from all of the user-available GPIO to the 10-pin debug connector, emulating a SPI bus to an Altera Stratix board. I am using the SPI interface to provide two async UART's, a number of GPIO, and a (relatively) high-speed synchronous serial link. I would like to implement one of the GPIO's as a RX/TX interrupt, to prevent the FIFO's from overflowing/underflowing.

I know that GPIO pins on Broadcom chips (WRT54G's) can be used as interrupt sources from searching the posts, but I'm not sure how to do that with the Atheros WISOC in the La Fonera's. I can see from the documentation that there is  an interrupt mask register, so it would make sense that it is possible, but how do you trap the interrupt? I am still a kernel module beginner. I just now have a driver that can speak SPI over GPIO, and report the contents of a SPI attached register vi a /proc file - but I really need interrupts for the next bit.

I have tried to create the largest FIFO's this FPGA can support, but the memory is limited, and it is possible to overflow with the 1Hz resolution timer that I appear to have access to via the kernel.

Could someone give me a pointer on how to trap and process that interrupt?

Alternately, is there a way to get sub 1Hz timing (that won't absolutely kill the kernel) for a kernel driver?

Thanks,
-Seth

(Last edited by jshamlet on 17 Sep 2007, 20:25)