OpenWrt Forum Archive

Topic: Failed to execute /init for Ralink SoC RT3052

The content of this topic has been archived between 1 Mar 2018 and 27 Apr 2018. There are no obvious gaps in this topic, but there may still be some posts missing at the end.

I have an RT3052f board with 32Mb of ram and 4Mb of flash.
I've compiled the fonosfera sources (after I've modified the ralink_flash.c module) but it's not booting up.

The CPU feqenuce set to 384 MHz
CPU revision is: 0001964c
Determined physical RAM map:
 memory: 04000000 @ 00000000 (usable)
Built 1 zonelists.  Total pages: 16256
Kernel command line: console=ttyS1,57600n8 root=/dev/mtdblock5 init=/etc/preinit
Primary instruction cache 32kB, physically tagged, 4-way, linesize 32 bytes.
Primary data cache 16kB, 4-way, linesize 32 bytes.
Synthesized TLB refill handler (20 instructions).
Synthesized TLB load handler fastpath (32 instructions).
Synthesized TLB store handler fastpath (32 instructions).
Synthesized TLB modify handler fastpath (31 instructions).
Cache parity protection disabled
cause = b0800014, status = 1100ff00
PID hash table entries: 256 (order: 8, 1024 bytes)
calculating r4koff... 003a9800(3840000)
CPU frequency 384.00 MHz
Using 192.000 MHz high precision timer.
Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)
Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)
Memory: 62104k/65536k available (2064k kernel code, 3368k reserved, 539k data, 104k init, 0k highmem)
Mount-cache hash table entries: 512
NET: Registered protocol family 16
Generic PHY: Registered new driver
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
Time: MIPS clocksource has been installed.
NET: Registered protocol family 2
IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
TCP established hash table entries: 2048 (order: 2, 16384 bytes)
TCP bind hash table entries: 2048 (order: 1, 8192 bytes)
TCP: Hash tables configured (established 2048 bind 2048)
TCP reno registered
ramips_gpio: done
squashfs: version 3.2-r2 (2007/01/15) Phillip Lougher
squashfs: LZMA suppport for slax.org by jro
Registering mini_fo version $Id$
JFFS2 version 2.2. (NAND) (SUMMARY)  (C) 2001-2006 Red Hat, Inc.
io scheduler noop registered
io scheduler deadline registered (default)
ramips_wdt: loaded
Serial: 8250/16550 driver $Revision: 1.3 $ 2 ports, IRQ sharing disabled
serial8250: ttyS0 at I/O 0xb0000500 (irq = 37) is a 16550A
serial8250: ttyS1 at I/O 0xb0000c00 (irq = 12) is a 16550A
ralink flash device: 0x1000000 at 0xbf000000
Ralink SoC physically mapped flash: Found 1 x16 devices at 0x0 in 16-bit bank
 Amd/Fujitsu Extended Query Table at 0x0040
Ralink SoC physically mapped flash: Swapping erase regions for broken CFI table.
number of CFI chips: 1
cfi_cmdset_0002: Disabling erase-suspend-program due to code brokenness.
Creating 6 MTD partitions on "Ralink SoC physically mapped flash":
0x00000000-0x00030000 : "uboot"
0x00030000-0x00040000 : "uboot-config"
0x00040000-0x00050000 : "factory-defaults"
0x00050000-0x00150000 : "linux"
0x00150000-0x00400000 : "rootfs"
mtd: partition "rootfs" set to be root filesystem
split_squashfs: unable to read superblock from "Ralink SoC physically mapped flash"
0x003f0000-0x00400000 : "nvram"
Initializing USB Mass Storage driver...
usbcore: registered new interface driver usb-storage
USB Mass Storage support registered.
usbcore: registered new interface driver libusual
Registered led device: gpio7
Registered led device: gpio9
Registered led device: gpio11
Registered led device: gpio14
nf_conntrack version 0.5.0 (512 buckets, 4096 max)
ip_tables: (C) 2000-2006 Netfilter Core Team, Type=Linux
TCP cubic registered
NET: Registered protocol family 1
NET: Registered protocol family 17
802.1Q VLAN Support v1.8 Ben Greear <greearb@candelatech.com>
All bugs added by David S. Miller <davem@redhat.com>
No filesystem could mount root, tried:  squashfs
Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(31,5)

Any help will be appreciated.

cj_man wrote:

I have an RT3052f board with 32Mb of ram and 4Mb of flash.
I've compiled the fonosfera sources (after I've modified the ralink_flash.c module) but it's not booting up.

Hi -

Which image did you try to boot from?

According to my experience:

- if kernel is configurated for 'RomFS_in_Ram', you should boot the "uImage" via TFTP
- if kernel is configurated for "RootFS_in_Flash", you should first get the Flash initialized with the "squashfs" image (via TFTP or through the rescue webserver, if any) then let the router boot on it

HTH

--
Olivier

olecam thanks for the info. It's working now but the ubs doesn't. When I try to copy something from the USB stick it gives me an Kernel error:

Unhandled kernel unaligned access[#1]:
Cpu 0
$ 0   : 00000000 1100fc00 00004000 810945c0
$ 4   : 810945c0 802c76c0 777db236 ffff00fe
$ 8   : 810adfe0 0000fc00 00000000 81322000
$12   : 810f65a0 00000000 00000000 813c7c20
$16   : 83fce060 811a1544 802c76c0 00000000
$20   : 00000000 00000000 813c7c20 0001e000
$24   : 00000000 80050208                  
$28   : 810ac000 810ade70 0001e000 80139944
Hi    : 00000000
Lo    : 00000000
epc   : 80070fe8 kmem_cache_free+0x48/0x118     Not tainted
ra    : 80139944 scsi_release_buffers+0x24/0x3c
Status: 1100fc03    KERNEL EXL IE 
Cause : 00800010
BadVA : 777db236
PrId  : 0001964c
Modules linked in: ftdi_sio cp2101 usbserial dwc_otg raeth nf_nat_sip nf_conntrack_sip nf_nat_pptp nf_conntrack_pptp nf_nat_h323 nf_conntrack_h323 nf_nat_proto_gre
Process ksoftirqd/0 (pid: 2, threadinfo=810ac000, task=810a57f0)
Stack : 811a1494 1100fc01 00000000 1100fc01 83fce060 811a1544 83fce060 80139944
        1100fc00 ffff00fe 810adfe0 0000fc00 00000000 801399a8 810f65a0 00000000
        00000000 813c7c20 811b0be8 00000000 00000000 0001e000 83fce060 810a7f08
        00000000 00000000 00000000 00000000 00000000 80141404 810ac000 810adf10
        83f52000 83f52c00 80134310 8013a370 00000000 80027c44 00000000 802b1e3c
        ...
Call Trace:
[<80070fe8>] kmem_cache_free+0x48/0x118
[<80139944>] scsi_release_buffers+0x24/0x3c
[<801399a8>] scsi_io_completion+0x4c/0x374
[<80141404>] sd_rw_intr+0x21c/0x258
[<800fcb4c>] blk_done_softirq+0x90/0xb0
[<80027c44>] __do_softirq+0x68/0xec
[<80027d20>] do_softirq+0x58/0x8c
[<8002829c>] ksoftirqd+0x64/0xac
[<8003a684>] kthread+0x1b8/0x224
[<80004274>] kernel_thread_helper+0x10/0x18


Code: 10400002  00801821  8cc6000c <8cc20000> 000211c2  38420001  30420001  00028036  8cc20018 
Kernel panic - not syncing: Fatal exception in interrupt
Rebooting in 3 seconds..

Note: hopefully I've fix it, in kernel it was defined RAM_SIZE=64 instead of 32

I've also bricked an board, I think it overridden the bootloader since the image was a few kilo bigger.
The board has an JTAG. I will work the unbuffered jtag cable on it?
http://www.drogoreanu.ro/tutorials/cablu-jtag.php
http://openbox.uv.ro/jtag.html

(Last edited by cj_man on 26 Oct 2009, 11:41)

Note: hopefully I've fix it, in kernel it was defined RAM_SIZE=64 instead of 32

Excellent. I also had to modify this value but I didn't remember it!

I've also bricked an board, I think it overridden the bootloader since the image was a few kilo bigger.

Probably. I personnaly bricked two routers before I realized that my image was too big! smile

The board has an JTAG. I will work the unbuffered jtag cable on it?

You're a lucky guy... As far as I know, there is no JTAG connector on the DIR-300 B1, just a serial port where one can't connect a terminal. There is absolutely no communication anymore on that port... sad

Regards,
--
Olivier

Hi

I have a belkin f5d8235-4 router with the 3052f Soc chip and a realtek rtl8366rb gigabit switch chip. I have followed the hints about using the fonosfera sources and the fonera2n target. I was getting memory errors until the last post about changing size from 64M to 32M in kernel build. Now I have a working system that I can talk to over the serial port. I see ethernet devices (ETH0, BR-LAN .... etc) the wireless device RA0 also shows up with iwconfig. I can NOT  access the router through any of  these devices. Its understandable with the switch at its not ralink device ( should not work ) but the wireless ap should come up. I would appreiciate any threads or tutorials that would help me understand how to get these devices talking.

regards

herb swanson

herbswanson did you've managed to compile the ralink_gpio suport using the fonera2n sources?
For me it's giving this error:

drivers/built-in.o: In function `read_zero':
drivers/char/mem.c:713: multiple definition of `info'
arch/mips/rt2880/built-in.o:arch/mips/rt2880/printf.c:56: first defined here
make[5]: *** [.tmp_vmlinux1] Error 1

I need those gpio pins so I can control the leds and receive events when buttons are pressed on the boards.

Note: I've fixed the above error by renaming the info structure from ralink_gpio.c

ralink_gpio_reg_info info;

I stil need to figure out how to control the leds and get events from buttons in hotplug2.

(Last edited by cj_man on 27 Oct 2009, 23:54)

cj_man

It gives me the same compile error when i select the ralink_gpio option. I'll take a look to see if I can find the source of the compile problem. What version of the kernel are you using, I am using the 2.6.21 that came with all of the fonosfera software would like to move to a more current version.

Regards

Herb Swanson

cj_man

Did a little research this morning below is what I found. Compiler was correct two unique defines of 'info' and the struct's are also different. Change must be to the namespace, unique name etc.


1st definition

./arch/mips/rt2880/gpio.h   

typedef struct {
    unsigned int irq;        //request irq pin number
    pid_t pid;                    //process id to notify
    char *name;                                                      <------------------------ note additional field
} ramips_gpio_reg_info;

./arch/mips/rt2880/gpio.c

ramips_gpio_reg_info info;                                         Note "info" is defined in the rt2880 mips area 1st


2nd definition


./drivers/char/ralink_gpio.h

typedef struct {
    unsigned int irq;        //request irq pin number
    pid_t pid;                    //process id to notify
} ralink_gpio_reg_info;

./drivers/char/ralink_gpio.c

ralink_gpio_reg_info info;                                            "info" is again defined in the drivers within the ralink_gpio.c pgm

Regards

Herb Swanson

I think those two are doing the same thing.
The  ./arch/mips/rt2880/gpio.c
is created by the fonera guys and the ./drivers/char/ralink_gpio.h is from Ralink.
Any idee how can I figure out which button is which and which led is which GPIO pin?

cj_man

I'll take a look at the code and get back to you in the next several day with what I find on gpio mapping on my machine.

Another question: I have got the device RA0 to come up and associate (by installing a RT2860.dat file), thus it broadcasts a SSID and accepts connections but I am unable to ping the router. The RealTek switch (RTL8366RB) on the board is unsupported (under open source). Is the RA0 traffic being routed through the switch to get to the Linux system code? Should I reconfigure router in regards to the lan/wan switch??

Regards

Herb Swanson

herbswanson wrote:

cj_man
It gives me the same compile error when i select the ralink_gpio option. I'll take a look to see if I can find the source of the compile problem. What version of the kernel are you using, I am using the 2.6.21 that came with all of the fonosfera software would like to move to a more current version.
Regards
Herb Swanson

I was told that's because the ralink drivers are binary signed for 2.6.21 kernel
if you build the atheros version (fonera2g) it will use a newer kernel...

other interesting stuff is that the ralink driver will store it's settings during boot in a /tmp/.... .tmp file or something?
somewhere logged on http://logs.nslu2-linux.org/livelogs/fonosfera

skynetbbs wrote:
herbswanson wrote:

cj_man
It gives me the same compile error when i select the ralink_gpio option. I'll take a look to see if I can find the source of the compile problem. What version of the kernel are you using, I am using the 2.6.21 that came with all of the fonosfera software would like to move to a more current version.
Regards
Herb Swanson

I was told that's because the ralink drivers are binary signed for 2.6.21 kernel
if you build the atheros version (fonera2g) it will use a newer kernel...

other interesting stuff is that the ralink driver will store it's settings during boot in a /tmp/.... .tmp file or something?
somewhere logged on http://logs.nslu2-linux.org/livelogs/fonosfera

All Ralink wireless drivers work off some config file. Usually /etc/Wireless/RTXXXX/RTXXXX.dat

Fonosfera has a symlink there that points to /tmp/RT2860.dat. The file is generated by /lib/wifi/rt2860.sh.

has anyone managed to control the gpio leds using the fonosfera build? I want to be able to turn on/off the power led.
echo "1" > /sys/class/led/gpio9/brightness
doesn't seem to have any effect.

cj_man wrote:

has anyone managed to control the gpio leds using the fonosfera build? I want to be able to turn on/off the power led.
echo "1" > /sys/class/led/gpio9/brightness
doesn't seem to have any effect.

The GPIOs on your board are likely different than the fonera2n.

For instance, the USB LED on my board is GPIO 20.

I've figure out which is reset button but regarding the GPIOs LEDs, how can I figure out which is which?
I've looked at some source codes and it seems that GPIO9 is the power led in all cases so I assumed that should be in my case too big_smile.

Is there a datasheet for this SoC?

aport in your case, are you able to control manually any of the leds?

cj_man

I have found several things that may help you out

Updated ralink_gpio.h file. This came from belkin site. 

https://www.belkin.com/support/opensour … GPL.tar.gz

The lights all work with the BELKIN router  they have 24 GPI0 pins defined as /proc/GPI0xx. I kept myself entertained for awhile turning them on and off.

Came back to the fonosfera build and was UNABLE to modify the lights by echoing 1 and 0. Mapping is the same. There is a gpio_switch in /proc and it may be necessary to enable the led function first. Also I noticed a "mode" command exists and it may be necessary to set the mode. Anyway look at the code. It does work with my hardware which is a 3052f chip packaged by Belkin.

CORRECTION: I haven't fixed the compile for the gpio modules. I'll fix that in the morning and give it another go. Still hope

SOME SUCCESS: I was able to turn led 11 on and off consistently. led 9 is blinking however by hammering it with 50 continuous "echo 1" it lit up for a short time but was consistently turned off by the blink. The other leds were unaffected by my actions.

/*
 ***************************************************************************
 * Ralink Tech Inc.
 * 4F, No. 2 Technology 5th Rd.
 * Science-based Industrial Park
 * Hsin-chu, Taiwan, R.O.C.
 *
 * (c) Copyright, Ralink Technology, Inc.
 *
 * All rights reserved. Ralink's source code is an unpublished work and the
 * use of a copyright notice does not imply otherwise. This source code
 * contains confidential trade secret material of Ralink Tech. Any attemp
 * or participation in deciphering, decoding, reverse engineering or in any
 * way altering the source code is stricitly prohibited, unless the prior
 * written consent of Ralink Technology, Inc. is obtained.
 ***************************************************************************
 */

#ifndef __RALINK_GPIO_H__
#define __RALINK_GPIO_H__

#include <asm/rt2880/rt_mmap.h>

/*
 * ioctl commands
 */
#define    RALINK_GPIO_SET_DIR        0x01
#define RALINK_GPIO_SET_DIR_IN        0x11
#define RALINK_GPIO_SET_DIR_OUT        0x12
#define    RALINK_GPIO_READ        0x02
#define    RALINK_GPIO_WRITE        0x03
#define    RALINK_GPIO_SET            0x21
#define    RALINK_GPIO_CLEAR        0x31
#define    RALINK_GPIO_READ_BIT        0x04
#define    RALINK_GPIO_WRITE_BIT        0x05
#define    RALINK_GPIO_READ_BYTE        0x06
#define    RALINK_GPIO_WRITE_BYTE        0x07
#define    RALINK_GPIO_READ_INT        0x02 //same as read
#define    RALINK_GPIO_WRITE_INT        0x03 //same as write
#define    RALINK_GPIO_SET_INT        0x21 //same as set
#define    RALINK_GPIO_CLEAR_INT        0x31 //same as clear
#define RALINK_GPIO_ENABLE_INTP        0x08
#define RALINK_GPIO_DISABLE_INTP    0x09
#define RALINK_GPIO_REG_IRQ        0x0A
#define RALINK_GPIO_LED_SET        0x41

#define FLASH_MAX_RW_SIZE        0x100


/*
 * Address of RALINK_ Registers
 */
#define RALINK_SYSCTL_ADDR        RALINK_SYSCTL_BASE    // system control
#define RALINK_REG_GPIOMODE        (RALINK_SYSCTL_ADDR + 0x60)
//+++Eric add
#define RALINK_SYSCFG_ADDR        (RALINK_SYSCTL_ADDR + 0x10)
#define RALINK_UARTF_PCM_MODE        0x00000040    //0:UART MODE, 1:PCM MODE
//---Eric add 
#define RALINK_IRQ_ADDR            RALINK_INTCL_BASE
#define RALINK_REG_INTENA        (RALINK_IRQ_ADDR + 0x34)
#define RALINK_REG_INTDIS        (RALINK_IRQ_ADDR + 0x38)

#define RALINK_PRGIO_ADDR        RALINK_PIO_BASE // Programmable I/O
#define RALINK_REG_PIOINT        (RALINK_PRGIO_ADDR + 0)
#define RALINK_REG_PIOEDGE        (RALINK_PRGIO_ADDR + 0x04)
#define RALINK_REG_PIORENA        (RALINK_PRGIO_ADDR + 0x08)
#define RALINK_REG_PIOFENA        (RALINK_PRGIO_ADDR + 0x0C)
#define RALINK_REG_PIODATA        (RALINK_PRGIO_ADDR + 0x20)
#define RALINK_REG_PIODIR        (RALINK_PRGIO_ADDR + 0x24)
#define RALINK_REG_PIOSET        (RALINK_PRGIO_ADDR + 0x2C)
#define RALINK_REG_PIORESET        (RALINK_PRGIO_ADDR + 0x30)


/*
 * Values for the GPIOMODE Register
 */
#ifdef CONFIG_RALINK_RT2880
#define RALINK_GPIOMODE_I2C        0x01
#define RALINK_GPIOMODE_UARTF        0x02
#define RALINK_GPIOMODE_SPI        0x04
#define RALINK_GPIOMODE_UARTL        0x08
#define RALINK_GPIOMODE_JTAG        0x10
#define RALINK_GPIOMODE_MDIO        0x20
#define RALINK_GPIOMODE_SDRAM        0x40
#define RALINK_GPIOMODE_PCI        0x80
#elif defined (CONFIG_RALINK_RT3052) || defined (CONFIG_RALINK_RT2883)
#define RALINK_GPIOMODE_I2C        0x01
#define RALINK_GPIOMODE_SPI        0x02
#define RALINK_GPIOMODE_UARTF        0x1C
#define RALINK_GPIOMODE_UARTL        0x20
#define RALINK_GPIOMODE_JTAG        0x40
#define RALINK_GPIOMODE_MDIO        0x80
#define RALINK_GPIOMODE_SDRAM        0x100
#define RALINK_GPIOMODE_RGMII        0x200
#endif

// if you would like to enable GPIO mode for other pins, please modify this value
// !! Warning: changing this value may make other features(MDIO, PCI, etc) lose efficacy
//Eric Modified from Old SDK
//#define RALINK_GPIOMODE_DFT        (RALINK_GPIOMODE_UARTF)
#define RALINK_GPIOMODE_DFT        (RALINK_GPIOMODE_UARTF)    | RALINK_GPIOMODE_I2C | RALINK_GPIOMODE_SPI | RALINK_GPIOMODE_JTAG
//#define RALINK_GPIOMODE_DFT        (RALINK_GPIOMODE_UARTF)    | RALINK_GPIOMODE_I2C | RALINK_GPIOMODE_SPI

/*
 * bit is the unit of length
 */
#define RALINK_GPIO_NUMBER        24
#define RALINK_GPIO_DATA_MASK        0x00FFFFFF
#define RALINK_GPIO_DATA_LEN        24
#define RALINK_GPIO_DIR_IN        0
#define RALINK_GPIO_DIR_OUT        1
#define RALINK_GPIO_DIR_ALLIN        0
#define RALINK_GPIO_DIR_ALLOUT        0x00FFFFFF

/*
 * structure used at regsitration
 */
typedef struct {
    unsigned int irq;        //request irq pin number
    pid_t pid;            //process id to notify
} ralink_gpio_reg_info;

#define RALINK_GPIO_LED_LOW_ACT        1
#define RALINK_GPIO_LED_INFINITY    4000
typedef struct {
//    int gpio;            //gpio number (0 ~ 23)
    int gpio;            //gpio number (-1, 0 ~ 24) //Porting from Old SDK
    unsigned int on;        //interval of led on
    unsigned int off;        //interval of led off
    unsigned int blinks;        //number of blinking cycles
    unsigned int rests;        //number of break cycles
    unsigned int times;        //blinking times
} ralink_gpio_led_info;

/*Gemtek WRTR-222N Add*/

/*
#define PORT0        0x000001    
#define PORT1        0x000002
#define PORT2        0x000004
#define PORT3        0x000008
#define PORT4        0x000010
#define PORT5        0x000020
#define PORT6        0x000040
#define PORT7        0x000080    
#define PORT8        0x000100    
#define PORT9        0x000200    
#define PORT10        0x000400
#define PORT11        0x000800    
#define PORT12        0x001000    
#define PORT13        0x002000    
#define PORT14        0x004000    
#define PORT15        0x008000
#define PORT16        0x010000
#define PORT17        0x020000
#define PORT18        0x040000
#define PORT19        0x080000
#define PORT20        0x100000
#define PORT21        0x200000
#define PORT22        0x400000
#define PORT23        0x800000
#define PORT24        0x1000000
#define PORT25        0x2000000
#define PORT26        0x4000000
#define PORT27        0x8000000
#define PORT28        0x10000000
#define PORT29        0x20000000
#define PORT30        0x40000000
#define PORT31        0x80000000
*/
#define SUPPORT_RESET_BUTTON        1
#define SUPPORT_AOSS_BUTTON            0
#define SUPPORT_SECURITY_LED_G    0
#define SUPPORT_SECURITY_LED_A    0
#define SUPPORT_DIAG_LED                 0
#define SUPPORT_WPS_BUTTON      1
#define SUPPORT_WPS_LED         1
#define SUPPORT_GEMTEK_MP_TEST  1
#define GPIO_STAT_OUT_LOW 0
#define GPIO_STAT_OUT_HIGH 1
#define GPIO_STAT_IN_LOW 2
#define GPIO_STAT_IN_HIGH 3

//Eric Modified 
/*


*/
#define GPIO_ALL_OUT_PORT    PORT8 | PORT11 | PORT12 | PORT13 | PORT14    //GPIO8¡B11¡B12¡B13¡B14
#define GPIO_ALL_IN_PORT        PORT0 | PORT7 | PORT10                                        //GPIO0¡B7¡B9

//#define AOSS_BTN_GPIO_PIN                    PORT0
#define AOSS_BTN_PRESSED_SECOND     3
#define SECURITY_LED_GPIO_PIN_G        PORT14    //Need change it's PORT number
#define SECURITY_LED_NUM_G                5
#define SECURITY_LED_GPIO_PIN_A        PORT15    //Need change it's PORT number
#define SECURITY_LED_NUM_A                5
#define RESET_GPIO_PIN                            PORT10
#define RESET_TIME                                    5
#define DIAG_LED_GPIO_PIN                    PORT16    //Need change it's PORT number
#define WPS_BTN_GPIO_PIN                    PORT0        //WPS Button

#define SPEED_CLEAN_GPIO_PIN                            PORT17    
#define SPEED_CLOCK_GPIO_PIN                            PORT18    

#define SUCCESS     0
#define FAILED -1

//Gemtek end Eric add

#define PORT0                0x00000001    //WPS Button
#define PORT1                0x00000002
#define PORT2                0x00000004
#define PORT3                0x00000008
#define PORT4                0x00000010    //Wireless Computer and Wire Computer LED Clock
#define PORT5                0x00000020    //Internet Blue
#define PORT6                0x00000040    //Internet Amber
#define PORT7                0x00000080
#define PORT8                0x00000100    //Modem Amber
#define PORT9                0x00000200    //Router Blue / Power Status
#define PORT10            0x00000400    //Reset Button
#define PORT11            0x00000800    //Modem Blue
#define PORT12            0x00001000    //Security Amber
#define PORT13            0x00002000    //Security Blue
#define PORT14            0x00004000    //Wireless Computer and Wire Computer LED Controller
#define PORT15            0x00008000
#define PORT16            0x00010000
#define PORT17            0x00020000    //Traffic LED Controller
#define PORT18            0x00040000    //Traffic LED Clock
#define PORT19            0x00080000
#define PORT20            0x00100000    //Watch dog 
#define PORT21            0x00200000    //Watch dog 
#define PORT22            0x00400000    //Storge Amber
#define PORT23            0x00800000    //Storge Blue
#define RALINK_GPIO(x)            (1 << x)

#endif

#define GMTK_CLOSE_SPEED_METER 0
#define GMTK_SYSTEM_READY 1
#define GMTK_SYSTEM_BOOT 2
#define GMTK_SPEED_METER_BOOT_UP_READY 3
#define GMTK_SPEED_METER_BOOT_UP 4
#define GMTK_WL_SEC_DISABLED 5
#define GMTK_WL_SEC_ENABLED 6
#define GMTK_LAN_LINK_DOWN 7
#define GMTK_LAN_LINK_UP 8
#define GMTK_LAN_LINK_ERROR 9
#define GMTK_WAN_MODEM_DOWN 10
#define GMTK_WAN_MODEM_UP 11
#define GMTK_WAN_MODEM_ERROR 12
#define GMTK_WAN_INTERNET_DOWN 13
#define GMTK_WAN_INTERNET_CONNECTING 14
#define GMTK_WAN_INTERNET_CONNECTED 15
#define GMTK_WAN_INTERNET_ERROR 16
#define GMTK_WL_CLI_NOT_ASSOC 17
#define GMTK_WL_CLI_ASSOC 18
#define GMTK_WL_CLI_ASSOC_ERROR 19
#define GMTK_USB_DOWN 20
#define GMTK_USB_READY 21
#define GMTK_USB_ERROR 22

//+++Eric add 
#define GMTK_NO_WIRE_WIRELESS_COMPUTER 23
#define GMTK_LAN_WL_LINK_UP 24
#define GMTK_LAN_UP_WL_ERROR 25
#define GMTK_LAN_ERROR_WL_UP 26
#define GMTK_LAN_ERROR_WL_ERROR 27
//---Eric add 

/*    Wireless Computer and Wire Computer LED
LAN_LED[10]
0:Wireless Blue
echo 0 > /proc/GPIO14 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ;

1:Wireless Amber
echo 0 > /proc/GPIO14 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ;echo 1 > /proc/GPIO14 ;echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ;

2:Wire Blue
echo 1 > /proc/GPIO14 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO14 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 1 > /proc/GPIO14 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ;echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ;echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ;

3:Wire Amber
echo 0 > /proc/GPIO14 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 1 > /proc/GPIO14 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ;

4:Wireless Blue & Wire Blue
echo 0 > /proc/GPIO14 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 1 > /proc/GPIO14 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO14 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ;

5:Wireless Blue & Wire Amber
echo 0 > /proc/GPIO14 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 1 > /proc/GPIO14 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO14 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ;

6:Wireless Amber & Wire Blue
echo 0 > /proc/GPIO14 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 1 > /proc/GPIO14 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ;

7:Wireless Amber & & Wire Amber
echo 0 > /proc/GPIO14 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 1 > /proc/GPIO14 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO14 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 1 > /proc/GPIO14 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ;

8:Wireless Blue & Wireless Amber & Wire Blue & & Wire Amber
echo 0 > /proc/GPIO14 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 

9:No LED
echo 1 > /proc/GPIO14 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 ; echo 0 > /proc/GPIO4 ; echo 1 > /proc/GPIO4 


*/

Regards

Herb Swanson

(Last edited by herbswanson on 31 Oct 2009, 23:21)

Herb thanks for the help. I've already compiled those sources with fonosfera build ( you need to add an compile also drivers/char/led_ioctl ) but didn't worked for my, most probably because my Power led is on a GPIO pin that's set to LOW by default (where the rest boards seems to have all pins set to HIGH) and I don't know which it is.

cj_man wrote:

I've figure out which is reset button but regarding the GPIOs LEDs, how can I figure out which is which?

I don't know if that helps but here is the list of the GPIO I have discovered on the DLink DIR-300 rev B:

GPIO0       -> input for the WPS button
GPIO8       -> output for the PWR/STATUS led (amber)
GPIO9       -> output for the PWR/STATUS led (green)
GPIO10     -> input for the RESET button
GPIO12     -> output for the WAN led (green)
GPIO13     -> output for the WPS led (blue, single color)
GPIO14     -> output for the WAN led (amber)

The WLAN led is managed differently (aka not directly controlled by a GPIO).

Hello,

I want to replace original Belkin firmware with openwrt/fonera but I can't find any working version.
Could you help me and share working version ? Please...

Regards. Pieta.

Hi Cj_man, olecam,herbswanson,aport

thanks for your earlier posts.

I have RT3052f board with 32Mb of ram and 4Mb of flash.

As per earlier advice on this thread , I build up fonera source code and transfering image "uImage" to my board but it give Bad Magic number error.

When I complied with openwrt source code, everything working fine with Trunk code ,but Wifi,USB,Ethernet is not working and even jffs2 storing on flash is not working.

From this thread i come to know that we can get module of wifi,USB,ethernet from fonera code and put in with openwrt code, but problem is its bound to kernel 2.6.21.

How can i build openwrt ralink build with 2.6.21 instead of 2.6.30.9 ?so that these three driver working well

does anyone have build openwrt image for Ralink 305x with wifi-usb-ehternet support?if possible kindly share openwrt image or config file.

any help would be highly appriciable.

thank you.

aj.pattel888


I have the belkin f5d8235-4 router that has the 3052f chip with a gigabit switch. The software for this board is available at

https://www.belkin.com/support/opensource/

It compiled with a minimum of problems. I've documented my this at

https://forum.openwrt.org/viewtopic.php?id=21998

If your board is supported at the belkin site , you can build the package and you will have everything working with a 2.6.21 kernel. If you want a newer kernel and driver it gets more complex. Belkin ships the rt2860_ap driver as a binary as well as the proprietary gigabit switch driver rtl8366rb.

I've been working at this puzzle for about 2 months now. I will share with you what I've learned. Each embedded system (board) is very tightly coupled with the installed boot loader. In my case it is Uboot software. The boot software finds,initializes and registers the various hardware devices on your board. In my case it is the wireless radio rt2860. console (uart), cpu , ethernet switch and the flash memory map. Access to these devices are via writing and reading from predetermined memory addresses. You can see some of these addresses in reviewing the /proc/kallsyms file and compare this with the System.map file for your kernel. The difficulty is that as of this time openwrt(2.6.30.9) has no idea of the configuration that has been created by the bootloader. Much of the device configuration is written in mapped flash area. When I compiled openwrt with a ramdisk filesystem I had no mapped flash. You can see what your flash map is by 'cat /proc/mtd'. File was empty (none defined) when I initially installed openwrt. I have since copied over the flash map program from the belkin tar ball 'drivers/mtd/maps/ralink-flash.c' and have the initialized flash-maps.

I still have no ethernet or wireless devices but my 2.6.30.9 kernel now sees the flash map. I am attempting to use the the new open source drivers rt2x00 with the kernel 2.6.30.9 as the drivers supplied by belkin only came in binary mode. I am building a uboot/pccboot compatible linux kernel to use with the filesystem and flashmap defined by uboot. I am hoping this will allow the 26.30.9 kernel to see the radio and ethernet devices. Openwrt with a ramdisk file system works fine but see nothing.

Regards

Herb Swanson

Hi herbswanson,

Thanks for your warm response.
Actually I have bought this Ralink router from Shenzhen.
Its hardware configuration is same as your's belkin except gigabit ethernet.its 10/100 ethernet port and it comes with basic ralink firmware.

Now I want to make run Openwrt on it.
Till now what i understand it, there are two ways to install openwrt in this board.

1.Download source from Openwrt.org
And build firmware as aport and you suggest in this blog.And I did it and it working well but not  USB ,Wifi,ethernet port due to kernel 2.6.30.9.


2.Download source from Fonera 2.0n and build.
And i did as you guys earlier explain it.
But if i build default as you explain,first is loaded successfully and all USB,Wifi,Ethernet driver built-in kernel works well but not able to find ramdisk and it give "Kernel Panic no init found error"

Then I tried to make RootFS_in_RAM instead of RootFS_in_FLASH but it also gives same error.

do I am making mistake in config?

If anyone has firmware or config files for fonera source code which works well with Ramdisk,please kindly share.


thank you.

aj.pattel888

Your boot software defines the flash map and the boot loader passes the mtdblock[0,1,2 ...] to use as the rootfs. The fonera flash map shows the root partition at /dev/mtdblock5. Your boot loader is passing a boot parameter for the factory defined flash eg root=/dev/mtdblockX thus the kernel panic. You can reflash the your flash memory with the fonera layout and then change the boot parameter to point to read root=/dev/mtdblock5. It should then find your rootfs. I just reflashed my router with the fonera software, the boot parameter was modified (by fonera and NOT me) and the rootfs was mounted from /dev/mtdblock5. Be careful that you do not write over the boot loader (eg bricked router). The boot loader is usually in the low memory of flash eg /dev/mtdblock0, I always check where the writing is going to be prior to flash. I got ethernet devices plus wireless ra0. To bring up the wireless you will need to install a RT2860.dat file (wireless configurations file, can be found via google) in /tmp. The devices show, the ra0 device can be connected to another wireless device but I cannot send or receive data on the devices. This is where I stopped several weeks ago and I went  back on working on openwrt port.

Regards

Herb Swanson

hi herbswanson

thanks for your kind advice.
I have tried and I changed driver/mtd/maps/ralink-flash.c according to openwrt source code.
Below is output of my tftp console,But unlucky same error.

I think I am somewhere making mistakes in choosing INITRAMFS/RAMDISK.

## Booting image at 80800000 ...
   Image Name:   MIPS OpenWrt Linux-2.6.21
   Created:      2009-12-03  15:11:59 UTC
   Image Type:   MIPS Linux Kernel Image (lzma compressed)
   Data Size:    3406647 Bytes =  3.2 MB
   Load Address: 80000000
   Entry Point:  80000000
   Verifying Checksum ... OK
   Uncompressing Kernel Image ... OK
No initrd
## Transferring control to Linux (at address 80000000) ...
## Giving linux memsize in MB, 32

Starting kernel ...


LINUX started...

THIS IS ASIC
Linux version 2.6.21 (root@ubuntu) (gcc version 4.1.2) #1 Thu Dec 3 20:41:38 IST 2009

The CPU feqenuce set to 384 MHz
CPU revision is: 0001964c
Determined physical RAM map:
memory: 02000000 @ 00000000 (usable)
Initrd not found or empty - disabling initrd
Built 1 zonelists.  Total pages: 8128
Kernel command line: console=ttyS1,57600n8 root=/dev/ram0
Primary instruction cache 32kB, physically tagged, 4-way, linesize 32 bytes.
Primary data cache 16kB, 4-way, linesize 32 bytes.
Synthesized TLB refill handler (20 instructions).
Synthesized TLB load handler fastpath (32 instructions).
Synthesized TLB store handler fastpath (32 instructions).
Synthesized TLB modify handler fastpath (31 instructions).
Cache parity protection disabled
cause = 10800000, status = 1100ff00
PID hash table entries: 128 (order: 7, 512 bytes)
calculating r4koff... 00177000(1536000)
CPU frequency 384.00 MHz
Using 192.000 MHz high precision timer.
Dentry cache hash table entries: 4096 (order: 2, 16384 bytes)
Inode-cache hash table entries: 2048 (order: 1, 8192 bytes)
Memory: 27276k/32768k available (2064k kernel code, 5492k reserved, 431k data, 2612k init, 0k highmem)
Mount-cache hash table entries: 512
NET: Registered protocol family 16
Generic PHY: Registered new driver
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
NET: Registered protocol family 2
Time: MIPS clocksource has been installed.
IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
TCP established hash table entries: 1024 (order: 1, 8192 bytes)
TCP bind hash table entries: 1024 (order: 0, 4096 bytes)
TCP: Hash tables configured (established 1024 bind 1024)
TCP reno registered
detected lzma initramfs
detected lzma initramfs
initramfs: LZMA lc=3,lp=0,pb=2,dictSize=1048576,origSize=9640960
LZMA initramfs by Ming-Ching Tiew <mctiew@yahoo.com>....................................................................................................................................................ramips_gpio: done
squashfs: version 3.2-r2 (2007/01/15) Phillip Lougher
squashfs: LZMA suppport for slax.org by jro
Registering mini_fo version $Id$
JFFS2 version 2.2. (NAND) (SUMMARY)  (C) 2001-2006 Red Hat, Inc.
io scheduler noop registered
io scheduler deadline registered (default)
ramips_wdt: loaded
Serial: 8250/16550 driver $Revision: 1.3 $ 2 ports, IRQ sharing disabled
serial8250: ttyS0 at I/O 0xb0000500 (irq = 37) is a 16550A
serial8250: ttyS1 at I/O 0xb0000c00 (irq = 12) is a 16550A
RAMDISK driver initialized: 16 RAM disks of 16384K size 1024 blocksize
ralink flash device: 0x1000000 at 0x1f000000
Ralink SoC physically mapped flash: Found 1 x16 devices at 0x0 in 16-bit bank
Amd/Fujitsu Extended Query Table at 0x0040
number of CFI chips: 1
cfi_cmdset_0002: Disabling erase-suspend-program due to code brokenness.
Creating 4 MTD partitions on "Ralink SoC physically mapped flash":
0x00000000-0x00030000 : "Bootloader"
0x00030000-0x00040000 : "Config"
0x00040000-0x00050000 : "Factory"
0x00050000-0x01000000 : "Kernel"
mtd: partition "Kernel" extends beyond the end of device "Ralink SoC physically mapped flash" -- size truncated to 0x3b0000
usbmon: debugfs is not available
Initializing USB Mass Storage driver...
usbcore: registered new interface driver usb-storage
USB Mass Storage support registered.
usbcore: registered new interface driver libusual
Registered led device: gpio7
Registered led device: gpio9
Registered led device: gpio11
Registered led device: gpio14
nf_conntrack version 0.5.0 (256 buckets, 2048 max)
ip_tables: (C) 2000-2006 Netfilter Core Team, Type=Linux
TCP cubic registered
NET: Registered protocol family 1
NET: Registered protocol family 17
802.1Q VLAN Support v1.8 Ben Greear <greearb@candelatech.com>
All bugs added by David S. Miller <davem@redhat.com>
Freeing unused kernel memory: 2612k freed
Failed to execute /init
Kernel panic - not syncing: No init found.  Try passing init= option to kernel.

aj.pattel888

Three items

    1. The fonera software defines a machine with 64meg of sdram. My board only had 32meg . I needed to change to 32meg. from 64meg using the make kernel_menuconfig.

    2. My boot of the fonera software show the following flash map when booting which is different than what you log shows.

Creating 6 MTD partitions on "Ralink SoC physically mapped flash":
0x00000000-0x00030000 : "uboot"
0x00030000-0x00040000 : "uboot-config"
0x00040000-0x00050000 : "boardconfig"
0x00050000-0x00800000 : "image"
0x00050000-0x00150000 : "linux"
0x00150000-0x00800000 : "rootfs"
mtd: partition "rootfs" set to be root filesystem
mtd: partition "rootfs_data" created automatically, ofs=540000, len=2C0000 
0x00540000-0x00800000 : "rootfs_data"
ramips_mtd: 0x1000000 at 0xbf000000

3. Your flash define 16meg of flash but you get memory error saying 16meg does not exist
mtd: partition "Kernel" extends beyond the end of device "Ralink SoC physically mapped flash" -- size truncated to 0x3b0000
you should check how much flash and sdram you have on the board

0x00000000-0x00030000 : "Bootloader"
0x00030000-0x00040000 : "Config"
0x00040000-0x00050000 : "Factory"
0x00050000-0x01000000 : "Kernel"    <--------0x01000000 equals 16meg

I needed to make minimal changes to the fonera software. I outlined only two changes needed to get the fonera software booted in my post of 10/27/09 on
https://forum.openwrt.org/viewtopic.php?id=21998

Regards

Herb Swanson

The discussion might have continued from here.