Yes, I did manage to get mine up and running.
Unfortunately, I don't have any experience with the layout you're describing. Mine was a v3, what version is yours?
What I did to figure out the layout was:
1. Hook up the ground to a known ground.
2. Since it is impossible to ruin chips with a logic level signal, I just tried all possible combinations!
To help with that task, I took the leads coming from the parallel port, tied them to a male header, soldered
another male header to the JTAG port, and hooked the two up with the little internal sound cables for PCs.
Each try I ran the debrick utility and looked at the binary string. It should be a pattern of 1s and 0s, NOT all
1s or all 0s.
3. When you get close, the screen might display all 1s. This simply means that the CLK is hooked up right; try
flipping the TDI and TDO pins, it worked for me!
Hope this helps,
Tim