Hello All,
been running test here for about 18 hours now without issue. So it seems that this patch has addressed my problem (as well as that for others). What is interesting is that we were very close about a year ago! Here is a comment made to me by @squonk
-----
BTW, this " WAR_USB_DISABLE_PLL_LOCK_DETECT()" patch is the same thing that was done in QCA's Open HAL here:
https://github.com/qca/qcamain_open_hal … eset.c#L76
I reported it in the forum:
https://forum.openwrt.org/viewtopic.php … 28#p197328
It looks very much like what was also suspected by @mips 1 year ago:
https://forum.openwrt.org/viewtopic.php … 31#p182631
The only difference is when this macro is called: we did not put it everywhere it was required...
-----
so... it seems that were very close but did not persist enough...
for those wanting to test this patch against the latest BB distribution just drop file this into
packages/mac80211/patches/566-ath9k_usb_hang_workaround.patch
Thanks to @squonk for providing this....
--- a/drivers/net/wireless/ath/ath9k/hw.c 2013-11-29 20:12:03.000000000 +0100
+++ b/drivers/net/wireless/ath/ath9k/hw.c 2013-12-15 17:20:40.727254556 +0100
@@ -35,6 +35,16 @@
MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
MODULE_LICENSE("Dual BSD/GPL");
+#define WAR_USB_DISABLE_PLL_LOCK_DETECT(_ah) \
+do { \
+ if (AR_SREV_9330(_ah) || AR_SREV_9340(_ah)) { \
+ volatile u_int32_t *usb_ctrl_r1 = (u_int32_t *) 0xb8116c84; \
+ volatile u_int32_t *usb_ctrl_r2 = (u_int32_t *) 0xb8116c88; \
+ *usb_ctrl_r1 = (*usb_ctrl_r1 & 0xffefffff); \
+ *usb_ctrl_r2 = (*usb_ctrl_r2 & 0xfc1fffff) | (1 << 21) | (3 << 22); \
+ } \
+} while (0)
+
static int __init ath9k_init(void)
{
return 0;
@@ -1390,6 +1400,8 @@
if (AR_SREV_9100(ah))
udelay(50);
+ WAR_USB_DISABLE_PLL_LOCK_DETECT(ah);
+
return true;
}
@@ -1490,6 +1502,8 @@
ar9003_hw_internal_regulator_apply(ah);
ath9k_hw_init_pll(ah, chan);
ath9k_hw_set_rfmode(ah, chan);
+
+ WAR_USB_DISABLE_PLL_LOCK_DETECT(ah);
return true;
}
@@ -1841,8 +1855,11 @@
if (AR_SREV_9271(ah))
ar9002_hw_load_ani_reg(ah, chan);
+ WAR_USB_DISABLE_PLL_LOCK_DETECT(ah);
+
return 0;
fail:
+ WAR_USB_DISABLE_PLL_LOCK_DETECT(ah);
return -EINVAL;
}
@@ -2052,6 +2069,8 @@
if (AR_SREV_9565(ah) && ah->shared_chain_lnadiv)
REG_SET_BIT(ah, AR_BTCOEX_WL_LNADIV, AR_BTCOEX_WL_LNADIV_FORCE_ON);
+ WAR_USB_DISABLE_PLL_LOCK_DETECT(ah);
+
return 0;
}
EXPORT_SYMBOL(ath9k_hw_reset);