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Topic: Help with Openwrt on 32M flash(MX25L25635E)

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I have a device which is very smillar to tplink-wdr4310.I want to replace original 8m flash with a MX25L25635E
http://see.sl088.com/w/images/4/4f/Slboat_eos_4268.JPG
Other info can be found here:http://see.sl088.com/wiki/MX25L25635

This flash chip is supported by linux kernel according to m25p80.h

/* Macronix */
   { "mx25l4005a",  INFO(0xc22013, 0, 64 * 1024,   8, SECT_4K) },
   { "mx25l8005",   INFO(0xc22014, 0, 64 * 1024,  16, 0) },
   { "mx25l1606e",  INFO(0xc22015, 0, 64 * 1024,  32, SECT_4K) },
   { "mx25l3205d",  INFO(0xc22016, 0, 64 * 1024,  64, 0) },
   { "mx25l6405d",  INFO(0xc22017, 0, 64 * 1024, 128, 0) },
   { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
   { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
   { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, 0) },
   { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) },

But after I add 32m flash layout in mktplinkfw.c
{
        .id        = "32Mlzma",
        .fw_max_len    = 0x1fc0000,
        .kernel_la    = 0x80060000,
        .kernel_ep    = 0x80060000,
        .rootfs_ofs    = 0x100000,
    }, {

and make wdr4310 image with this layout and then flash it into my device.
I saw no root is found in ttl booting message.

However,for those who think 16 MB is probably maximum in single chip for this platform,here is a succesful booting on 32m flash from a Chinese  openwrt seller .Of course,he won't tell the truth.We just can wait for gurus here to help figure it out.

U-Boot 1.1.4 (Mar 13 2013 - 20:16:16)

DRAM:  128 MB
id read 0x100000ff
flash size 16MB, sector count = 256
Flash: 16 MB
Using default environment

In:    serial
Out:   serial
Err:   serial
Net:   ag934x_enet_initialize...
MAC Address from : 0x9f01fc00
 wasp  reset mask:c03300 
WASP  ----> S17 PHY *
: cfg1 0x7 cfg2 0x7114
eth0: 6c:e8:73:ff:d6:88
athrs17_reg_init: complete
eth0 up
eth0
Autobooting in 1 seconds,press p stop 
Reset Button Not Push down !
Push Reset Button For Http Support !
router ip: 192.168.1.1 
## Booting image at 9f020000 ...
   Uncompressing Kernel Image ... OK

Starting kernel ...

[    0.000000] Linux version 3.3.8 (icetree@rtnas-server) (gcc version 4.6.3 20120201 (prerelease) (Linaro GCC 4.6-2012.02) ) #17 Sun Apr 21 09:27:42 CST 2013
[    0.000000] bootconsole [early0] enabled
[    0.000000] CPU revision is: 0001974c (MIPS 74Kc)
[    0.000000] SoC: Atheros AR9344 rev 2
[    0.000000] Clocks: CPU:560.000MHz, DDR:450.000MHz, AHB:225.000MHz, Ref:40.000MHz
[    0.000000] Determined physical RAM map:
[    0.000000]  memory: 08000000 @ 00000000 (usable)
[    0.000000] Initrd not found or empty - disabling initrd
[    0.000000] Zone PFN ranges:
[    0.000000]   Normal   0x00000000 -> 0x00008000
[    0.000000] Movable zone start PFN for each node
[    0.000000] Early memory PFN ranges
[    0.000000]     0: 0x00000000 -> 0x00008000
[    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 32512
[    0.000000] Kernel command line:  board=TL-WDR4300 console=ttyS0,115200 rootfstype=squashfs,jffs2 noinitrd
[    0.000000] PID hash table entries: 512 (order: -1, 2048 bytes)
[    0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
[    0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
[    0.000000] Primary instruction cache 64kB, VIPT, 4-way, linesize 32 bytes.
[    0.000000] Primary data cache 32kB, 4-way, VIPT, cache aliases, linesize 32 bytes
[    0.000000] Writing ErrCtl register=00000000
[    0.000000] Readback ErrCtl register=00000000
[    0.000000] Memory: 126584k/131072k available (2106k kernel code, 4488k reserved, 407k data, 212k init, 0k highmem)
[    0.000000] SLUB: Genslabs=9, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[    0.000000] NR_IRQS:51
[    0.000000] Calibrating delay loop... 278.93 BogoMIPS (lpj=1394688)
[    0.070000] pid_max: default: 32768 minimum: 301
[    0.070000] Mount-cache hash table entries: 512
[    0.080000] NET: Registered protocol family 16
[    0.080000] gpiochip_add: registered GPIOs 0 to 22 on device: ath79
[    0.090000] MIPS: machine is TP-LINK TL-WDR3600/4300/4310
[    0.090000] registering PCI controller with io_map_base unset
[    0.310000] bio: create slab <bio-0> at 0
[    0.310000] PCI host bridge to bus 0000:00
[    0.320000] pci_bus 0000:00: root bus resource [mem 0x10000000-0x13ffffff]
[    0.320000] pci_bus 0000:00: root bus resource [io  0x0000]
[    0.330000] pci 0000:00:00.0: invalid calibration data
[    0.330000] pci 0000:00:00.0: BAR 0: assigned [mem 0x10000000-0x1001ffff 64bit]
[    0.340000] pci 0000:00:00.0: BAR 6: assigned [mem 0x10020000-0x1002ffff pref]
[    0.340000] pci 0000:00:00.0: using irq 40 for pin 1
[    0.350000] Switching to clocksource MIPS
[    0.350000] NET: Registered protocol family 2
[    0.360000] IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.360000] TCP established hash table entries: 4096 (order: 3, 32768 bytes)
[    0.370000] TCP bind hash table entries: 4096 (order: 2, 16384 bytes)
[    0.370000] TCP: Hash tables configured (established 4096 bind 4096)
[    0.380000] TCP reno registered
[    0.380000] UDP hash table entries: 256 (order: 0, 4096 bytes)
[    0.390000] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
[    0.390000] NET: Registered protocol family 1
[    0.410000] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    0.420000] JFFS2 version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
[    0.430000] msgmni has been set to 247
[    0.430000] io scheduler noop registered
[    0.440000] io scheduler deadline registered (default)
[    0.440000] Serial: 8250/16550 driver, 1 ports, IRQ sharing disabled
[    0.470000] serial8250.0: ttyS0 at MMIO 0x18020000 (irq = 11) is a 16550A
[    0.470000] console [ttyS0] enabled, bootconsole disabled
[    0.470000] console [ttyS0] enabled, bootconsole disabled
[    0.490000] m25p80 spi0.0: found mx25l25635e, expected m25p80
[    0.490000] m25p80 spi0.0: mx25l25635e (32768 Kbytes)
[    0.500000] 5 tp-link partitions found on MTD device spi0.0
[    0.510000] Creating 5 MTD partitions on "spi0.0"(32768 Kbytes):
[    0.510000] 0x000000000000-0x000000020000 : "u-boot"
[    0.520000] 0x000000020000-0x000000100908 : "kernel"
[    0.520000] mtd: partition "kernel" must either start or end on erase block boundary or be smaller than an erase block -- forcing read-only
[    0.540000] 0x000000100908-0x000001ff0000 : "rootfs"
[    0.540000] mtd: partition "rootfs" must either start or end on erase block boundary or be smaller than an erase block -- forcing read-only
[    0.560000] mtd: partition "rootfs" set to be root filesystem
[    0.560000] mtd: partition "rootfs_data" created automatically, ofs=E20000, len=11D0000 
[    0.570000] 0x000000e20000-0x000001ff0000 : "rootfs_data"
[    0.580000] 0x000001ff0000-0x000002000000 : "art"
[    0.580000] 0x000000020000-0x000001ff0000 : "firmware"
[    0.720000] ag71xx_mdio: probed
[    0.730000] eth0: Atheros AG71xx at 0xb9000000, irq 4
[    1.300000] eth0: Atheros AR8327 switch driver attached.
[    2.460000] ag71xx ag71xx.0: eth0: connected to PHY at ag71xx-mdio.0:00 [uid=004dd033, driver=Atheros AR8216/AR8236/AR8316]
[    2.480000] TCP cubic registered
[    2.480000] NET: Registered protocol family 17
[    2.480000] 8021q: 802.1Q VLAN Support v1.8
[    2.500000] VFS: Mounted root (squashfs filesystem) readonly on device 31:2.
[    2.500000] Freeing unused kernel memory: 212k freed
- preinit -
Press the [f] key and hit [enter] to enter failsafe mode
[    6.470000] eth0: link up (1000Mbps/Full duplex)
- regular preinit -
[    8.910000] JFFS2 notice: (447) jffs2_build_xattr_subsystem: complete building xattr subsystem, 2 of xdatum (1 unchecked, 1 orphan) and 43 of xref (0 dead, 3 orphan) found.
[    9.800000] SCSI subsystem initialized
[   10.050000] usbcore: registered new interface driver usbfs
[   10.060000] usbcore: registered new interface driver hub
[   10.070000] usbcore: registered new device driver usb
[   10.550000] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[   10.560000] ehci-platform ehci-platform: Generic Platform EHCI Controller
[   10.560000] ehci-platform ehci-platform: new USB bus registered, assigned bus number 1
[   10.600000] ehci-platform ehci-platform: irq 3, io mem 0x1b000000
[   10.620000] ehci-platform ehci-platform: USB 2.0 started, EHCI 1.00
[   10.620000] hub 1-0:1.0: USB hub found
[   10.630000] hub 1-0:1.0: 1 port detected
[   10.740000] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
[   10.800000] Initializing USB Mass Storage driver...
[   10.800000] usbcore: registered new interface driver usb-storage
[   10.810000] USB Mass Storage support registered.
switching to jffs2
- init -
[   32.040000] eth0: link down

Please press Enter to activate this console. [   37.090000] Compat-drivers backport release: compat-drivers-2012-09-04-2-gddac993
[   37.100000] Backport based on wireless-testing.git master-2012-09-07
[   37.100000] compat.git: wireless-testing.git
[   37.160000] cfg80211: Calling CRDA to update world regulatory domain
[   37.170000] cfg80211: World regulatory domain updated:
[   37.170000] cfg80211:   (start_freq - end_freq @ bandwidth), (max_antenna_gain, max_eirp)
[   37.180000] cfg80211:   (2402000 KHz - 2494000 KHz @ 40000 KHz), (N/A, 3000 mBm)
[   37.190000] cfg80211:   (4910000 KHz - 5835000 KHz @ 40000 KHz), (N/A, 3000 mBm)
[   38.520000] NET: Registered protocol family 10
[   42.560000] usbcore: registered new interface driver rtl8187
[   42.590000] ieee80211 phy0: Atheros AR9340 Rev:0 mem=0xb8100000, irq=47
[   42.600000] PCI: Enabling device 0000:00:00.0 (0000 -> 0002)
[   42.620000] ieee80211 phy1: Atheros AR9300 Rev:4 mem=0xb0000000, irq=40
[   42.640000] usbcore: registered new interface driver rt2800usb
[   42.650000] cfg80211: Calling CRDA for country: US
[   42.650000] cfg80211: Regulatory domain changed to country: US
[   42.660000] cfg80211:   (start_freq - end_freq @ bandwidth), (max_antenna_gain, max_eirp)
[   42.660000] cfg80211:   (2402000 KHz - 2494000 KHz @ 40000 KHz), (N/A, 3000 mBm)
[   42.670000] cfg80211:   (4910000 KHz - 5835000 KHz @ 40000 KHz), (N/A, 3000 mBm)
[   42.910000] RPC: Registered named UNIX socket transport module.
[   42.910000] RPC: Registered udp transport module.
[   42.920000] RPC: Registered tcp transport module.
[   42.920000] RPC: Registered tcp NFSv4.1 backchannel transport module.
[   44.040000] PPP generic driver version 2.4.2
[   44.170000] tun: Universal TUN/TAP device driver, 1.6
[   44.170000] tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com>
[   44.250000] PPP MPPE Compression module registered
[   44.370000] L2TP core driver, V2.0
[   44.400000] L2TP netlink interface
[   44.470000] IPv6 over IPv4 tunneling driver
[   44.550000] GRE over IPv4 demultiplexor driver
[   44.570000] GRE over IPv4 tunneling driver
[   45.340000] Installing knfsd (copyright (C) 1996 okir@monad.swb.de).
[   45.700000] ip_tables: (C) 2000-2006 Netfilter Core Team
[   45.930000] NET: Registered protocol family 24
[   46.180000] nf_conntrack version 0.5.0 (1981 buckets, 7924 max)
[   46.780000] PPPoL2TP kernel driver, V2.0
[   46.800000] PPTP driver version 0.8.5
[   47.510000] IMQ driver loaded successfully. (numdevs = 2, numqueues = 1)
[   47.520000]     Hooking IMQ before NAT on PREROUTING.
[   47.530000]     Hooking IMQ after NAT on POSTROUTING.
[   47.800000] xt_time: kernel timezone is -0000
[   48.880000] i2c /dev entries driver
[   49.000000] usbcore: registered new interface driver usblp
[   49.030000] usbcore: registered new interface driver usbserial
[   49.030000] USB Serial support registered for generic
[   49.040000] usbcore: registered new interface driver usbserial_generic
[   49.040000] usbserial: USB Serial Driver core
[   49.170000] usbcore: registered new interface driver ums-alauda
[   49.210000] usbcore: registered new interface driver ums-cypress
[   49.320000] usbcore: registered new interface driver ums-datafab
[   49.340000] usbcore: registered new interface driver ums-freecom
[   49.370000] usbcore: registered new interface driver ums-isd200
[   49.400000] usbcore: registered new interface driver ums-jumpshot
[   49.430000] usbcore: registered new interface driver ums-karma
[   49.450000] usbcore: registered new interface driver ums-sddr09
[   49.470000] usbcore: registered new interface driver ums-sddr55
[   49.490000] usbcore: registered new interface driver ums-usbat
[   49.610000] Linux video capture interface: v2.00
[   49.730000] usbcore: registered new interface driver zd1211rw
[   49.840000] USB Serial support registered for GSM modem (1-port)
[   49.840000] usbcore: registered new interface driver option
[   49.850000] option: v0.7.2:USB Driver for GSM modems
[   50.050000] fuse init (API version 7.18)
[   50.210000] usbcore: registered new interface driver uvcvideo
[   50.220000] USB Video Class driver (1.1.1)
[   55.050000] ADDRCONF(NETDEV_UP): eth0: link is not ready
[   56.860000] eth0: link up (1000Mbps/Full duplex)
[   56.880000] ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
[   58.710000] eth0: link down
[   58.710000] ADDRCONF(NETDEV_UP): eth0: link is not ready
[   58.720000] ADDRCONF(NETDEV_UP): eth0.1: link is not ready
[   58.730000] device eth0.1 entered promiscuous mode
[   58.730000] device eth0 entered promiscuous mode
[   58.740000] ADDRCONF(NETDEV_UP): br-lan: link is not ready
[   58.750000] ADDRCONF(NETDEV_UP): eth0.2: link is not ready
[   59.880000] eth0: link up (1000Mbps/Full duplex)
[   59.880000] ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
[   59.940000] br-lan: port 1(eth0.1) entered forwarding state
[   59.950000] br-lan: port 1(eth0.1) entered forwarding state
[   59.950000] ADDRCONF(NETDEV_CHANGE): eth0.1: link becomes ready
[   59.990000] ADDRCONF(NETDEV_CHANGE): eth0.2: link becomes ready
[   59.990000] ADDRCONF(NETDEV_CHANGE): br-lan: link becomes ready
[   61.950000] br-lan: port 1(eth0.1) entered forwarding state
[   63.540000] cfg80211: Calling CRDA to update world regulatory domain
[   63.540000] cfg80211: World regulatory domain updated:
[   63.550000] cfg80211:   (start_freq - end_freq @ bandwidth), (max_antenna_gain, max_eirp)
[   63.560000] cfg80211:   (2402000 KHz - 2494000 KHz @ 40000 KHz), (N/A, 3000 mBm)
[   63.560000] cfg80211:   (4910000 KHz - 5835000 KHz @ 40000 KHz), (N/A, 3000 mBm)
[   66.990000] ADDRCONF(NETDEV_UP): wlan0: link is not ready
[   67.030000] device wlan0 entered promiscuous mode
[   67.120000] ADDRCONF(NETDEV_UP): wlan0: link is not ready
[   67.180000] br-lan: port 2(wlan0) entered forwarding state
[   67.180000] br-lan: port 2(wlan0) entered forwarding state
[   67.190000] ADDRCONF(NETDEV_CHANGE): wlan0: link becomes ready
[   69.180000] br-lan: port 2(wlan0) entered forwarding state
[   72.590000] ADDRCONF(NETDEV_UP): wlan1: link is not ready
[   72.630000] device wlan1 entered promiscuous mode
[   72.680000] ADDRCONF(NETDEV_UP): wlan1: link is not ready
[   72.690000] br-lan: port 3(wlan1) entered forwarding state
[   72.690000] br-lan: port 3(wlan1) entered forwarding state
[   72.700000] ADDRCONF(NETDEV_CHANGE): wlan1: link becomes ready
[   74.690000] br-lan: port 3(wlan1) entered forwarding state

(Last edited by mtk on 22 Jun 2013, 08:22)

Why didn't you upload official OpenWrt AA image for WDR43x0? It will recognize bigger flash and automatically adjust partitions. You don't need to compile image for bigger flashes.

mtk wrote:

However,for those who think 16 MB is probably maximum in single chip for this platform,here is a succesful booting on 32m flash...

wow statement ...
Size is limited by the hardware.
Window access to data - the size of 16 MB, and all!
Other devices that you may find 32mb - have two chip 16MB
And in general can be any number of devices on the SPI bus spi0.0, spi0.1...spi0.N, limit only in the number of free gpio(for CS#).

Your chip will be used just on the half, the other half of the chip you never can read/write via router.

(Last edited by Dioptimizer on 22 Jun 2013, 14:45)

Dioptimizer wrote:
mtk wrote:

However,for those who think 16 MB is probably maximum in single chip for this platform,here is a succesful booting on 32m flash...

wow statement ...
Size is limited by the hardware.
Window access to data - the size of 16 MB, and all!
Other devices that you may find 32mb - have two chip 16MB
And in general can be any number of devices on the SPI bus spi0.0, spi0.1...spi0.N, limit only in the number of free gpio(for CS#).

Your chip will be used just on the half, the other half of the chip you never can read/write via router.

I can definitely tell you,ar9344 support 32m single chip and all space can be used if you know the trick to get 32m recognized.Just refer to the boot log on #1.This is from the one that my friend bought it from a Chinese who mod routers for money which cost him about 71 dollars.For comparision, this device's orginal stock price in China is about 40 dolloar.

(Last edited by mtk on 22 Jun 2013, 19:37)

pepe2k wrote:

Why didn't you upload official OpenWrt AA image for WDR43x0? It will recognize bigger flash and automatically adjust partitions. You don't need to compile image for bigger flashes.

I've tried already tried before and failed.

mtk wrote:
pepe2k wrote:

Why didn't you upload official OpenWrt AA image for WDR43x0? It will recognize bigger flash and automatically adjust partitions. You don't need to compile image for bigger flashes.

I've tried already tried before and failed.

And what went wrong?
How did your friend check that he can use all 32 MB space? This bootlog doesn't prove anything... it just tells that kernel recognize flash correctly.

(Last edited by pepe2k on 22 Jun 2013, 20:59)

mtk wrote:

I can definitely tell you,ar9344 support 32m single chip and all space can be used if you know the trick to get 32m recognized.Just refer to the boot log on #1.This is from the one that my friend bought it from a Chinese who mod routers for money which cost him about 71 dollars.For comparision, this device's orginal stock price in China is about 40 dolloar.

Could you please provide a direct link where I can buy it? I was unable to find such mod on eBay.

otlabs wrote:
mtk wrote:

I can definitely tell you,ar9344 support 32m single chip and all space can be used if you know the trick to get 32m recognized.Just refer to the boot log on #1.This is from the one that my friend bought it from a Chinese who mod routers for money which cost him about 71 dollars.For comparision, this device's orginal stock price in China is about 40 dolloar.

Could you please provide a direct link where I can buy it? I was unable to find such mod on eBay.

I don't know if it is allowed to post a direct link to a seller page.But you can search this keyword "mw4530r" on http://www.taobao.com,from price highest to lowest and the highest price is it.:lol

(Last edited by mtk on 23 Jun 2013, 03:34)

mtk, thank you! I found it - it is a Mercury MW4530r 32MiB Flash 128MiB RAM, it would be hard to place an order on taobao for western speaker, but I will try.

I was unable to find any traces of 32MiB Flash memory in bootlog for that device, please, take a look on this fragment:

U-Boot 1.1.4 (Mar 13 2013 - 20:16:16)

DRAM:  128 MB
id read 0x100000ff
flash size 16MB, sector count = 256
Flash: 16 MB
Using default environment

I see just 16MiB flash.

(Last edited by otlabs on 23 Jun 2013, 06:55)

otlabs wrote:

mtk, thank you! I found it - it is a Mercury MW4530r 32MiB Flash 128MiB RAM, it would be hard to place an order on taobao for western speaker, but I will try.

I was unable to find any traces of 32MiB Flash memory in bootlog for that device, please, take a look on this fragment:

U-Boot 1.1.4 (Mar 13 2013 - 20:16:16)

DRAM:  128 MB
id read 0x100000ff
flash size 16MB, sector count = 256
Flash: 16 MB
Using default environment

I see just 16MiB flash.

Yes,he use a 16m u-boot to load 32m flash.
But you can see the 32mb flash is recognized from mtd part.

[    0.510000] Creating 5 MTD partitions on "spi0.0"(32768 Kbytes):
[    0.510000] 0x000000000000-0x000000020000 : "u-boot"
[    0.520000] 0x000000020000-0x000000100908 : "kernel"
[    0.520000] mtd: partition "kernel" must either start or end on erase block boundary or be smaller than an erase block -- forcing read-only
[    0.540000] 0x000000100908-0x000001ff0000 : "rootfs"
[    0.540000] mtd: partition "rootfs" must either start or end on erase block boundary or be smaller than an erase block -- forcing read-only
[    0.560000] mtd: partition "rootfs" set to be root filesystem
[    0.560000] mtd: partition "rootfs_data" created automatically, ofs=E20000, len=11D0000 
[    0.570000] 0x000000e20000-0x000001ff0000 : "rootfs_data"
[    0.580000] 0x000001ff0000-0x000002000000 : "art"
[    0.580000] 0x000000020000-0x000001ff0000 : "firmware"
[    0.720000] ag71xx_mdio: probed 

This mx25l25635e chip only cost about 2.5 dollars and his device just provide more space for you to install stuff to flash.From this perspective,I don't think it's worth it to buy one to give him 40% profit.

mtk, thank you for pointing out this fine detail:

[    0.510000] Creating 5 MTD partitions on "spi0.0"(32768 Kbytes):

Sorry, but I still have my doubts about possibility to use 32MiB Flash - I looked for the same string in TL-MR10U bootlog (http://wiki.openwrt.org/toh/tp-link/tl-mr10u) and got following line:

[    0.500000] Creating 5 MTD partitions on "spi0.0":

As you can see it is slightly different - it does not provide any size message. Could it be some kind of trick to make people believe that this device has 32MiB flash?

I assume that you have an access to this moded Mercury, maybe you can run more tests to make sure the device actually has 32MiB Flash?

Soldering flash SOP16 chip is not so hard, yes, but you need skills and tools, but I am unable to solder WSON8. I do not think that 40% profit is so much for a work well done. Anyway, nobody limits you to DIY :-)

(Last edited by otlabs on 23 Jun 2013, 07:39)

I think that we could solder even a 64 MiB FLASH and if kernel supports the chip it will recognize it correctly. But probably we won't be able to use all available size, because the SPI has limited address space.

For now, in my opinion 16 MiB is the maximum size in single SPI chip for this platform, but I will be very glad if I'm wrong. Someone should make some tests (for example: upload and download from router 20 MB file over SCP and verify checksums) and prove that it is possible to use chip bigger than 16 MiB on this SoC.

For me, these offers are fakes.

[ 0.570000] 0x000000e20000-0x000001ff0000 : "rootfs_data"

????

i thought this was a proof of 32mb chip..

nebbia88 wrote:

[ 0.570000] 0x000000e20000-0x000001ff0000 : "rootfs_data"

????

i thought this was a proof of 32mb chip..

I can post bootlog with 512 MiB SPI FLASH... will it prove that we can use 512 MiB SPI FLASH on this SoC? No.

I can't see any tests which prove that this space is available for writing and reading. If someone has access to these modified routers or to 32 MiB FLASH chips, please - make and publish some tests. Bootlog isn't a proof.

{
        .id        = "32Mlzma",
        .fw_max_len    = 0x1fc0000,
        .kernel_la    = 0x80060000,
        .kernel_ep    = 0x80060000,
        .rootfs_ofs    = 0x100000,
    }, {

Physical start address 0x9F000000
0x9F000000 + 1000000 (16MB) = 0x9FFFFFFF
0x9F000000 + 2000000 (32MB) =?
Addresses 0xA0FFFFFF - does not exist.
What is it all?

If the boot loader can be seen

## Booting image at 9f020000 ...

All clear what it is limited.

Plus for all Atheros wrote a special SPI driver if it supports additional address space, does not that mean would not have to re-create / build a driver?
If the manufacturer uses the same SPI for all product lines ATH79, then what kind of hoping we talking about?
Your reasoning is like a childhood dream, like: what if you can overclock to 100%, or what if the developer has done a good hidden feature ...

Price of the device - characterizes the functionality of the device.

(Last edited by Dioptimizer on 23 Jun 2013, 17:45)

otlabs wrote:

Soldering flash SOP16 chip is not so hard, yes, but you need skills and tools, but I am unable to solder WSON8. I do not think that 40% profit is so much for a work well done. Anyway, nobody limits you to DIY :-)

If you don't know how to make openwrt use 32m flash on this target,then you can only use his firmware after buying that. And what he does is some kind of gpl violation.

(Last edited by mtk on 24 Jun 2013, 13:03)

Dioptimizer wrote:

Your reasoning is like a childhood dream, like: what if you can overclock to 100%, or what if the developer has done a good hidden feature ...

I am able to overclock this platform to 800~820 MHz smile

BTW. I think that you have mixed U-Boot and kernel address spaces. They are not the same.

mtk wrote:
pepe2k wrote:

Why didn't you upload official OpenWrt AA image for WDR43x0? It will recognize bigger flash and automatically adjust partitions. You don't need to compile image for bigger flashes.

I've tried already tried before and failed.

@mtk, what went wrong? Could you post full log from OpenWrt AA booting on 32 MB flash?

pepe2k wrote:

I am able to overclock this platform to 800~820 MHz smile

You populist? No, you probably populist. Yeah, and how much percent of overclocking tests?

Once you have reduced the frequency of the AHB, you tested a maximum speed of USB and Ethernet connection? Test please -  the speed decreased.

Manual wrote:

2.4 AHB Master Bus
Some AHB masters are connected to the
internal DDR AHB master interface, such as
USB, GE0, GE1 WLAN, MAC, etc. The AHB
master bus modules each include a DMA to
move data, like the descriptors prepared by the
CPU, between the AHB masters and the
external memory.

pepe2k wrote:

BTW. I think that you have mixed U-Boot and kernel address spaces. They are not the same.

yikes
I'm tired.

mtk
In short:
I am writing - not waste time in vain, you will fail, you've screwed up when you bought the 32mb flash memory.
pepe2k writes - try myself wondering - your hands...

(Last edited by Dioptimizer on 24 Jun 2013, 14:31)

Dioptimizer wrote:
pepe2k wrote:

I am able to overclock this platform to 800~820 MHz smile

You populist? No, you probably populist. Yeah, and how much percent of overclocking tests?

Once you have reduced the frequency of the AHB, you tested a maximum speed of USB and Ethernet connection? Test please -  the speed decreased.

Why are you so skeptic? I have overclocked also the AHB smile

Here you go: https://forum.openwrt.org/viewtopic.php?id=44012.

There are only tests for 780/480/240 MHz settings but I have on my desk WDR3600 which is stable at higher clocks. I made also U-Boot with overclocking possibilities... so, I'm not a populist, but you are probably blind, because my topic about overclocking AR9344 is laying here since ~6 weeks...

PS. Your English is unacceptable!

(Last edited by pepe2k on 24 Jun 2013, 14:52)

pepe2k

So, no one disputes Well done, thank you for what you have there!
About overclocking - I expressed my opinion.

pepe2k wrote:

PS. Your English is unacceptable!

My English - is the result of the quality of the colonial policy of some countries as a result of effect on education.
I'm tired of apologizing, I'm working on it. tongue

Dioptimizer wrote:

About overclocking - I expressed my opinion.

Yes, I know your opinion but I think that it is no longer valid wink

I made some USB speed test after overclocking and increasing AHB clock affects also on USB speed.
It's almost linear relation between AHB clock and USB speed. And what is very helpful on AR9344 - we can choose clock for AHB - it can be generated from CPU or RAM, so we are able to increase CPU and AHB without touching RAM frequency.

Of course, overclocking only CPU and/or RAM will result only in computation speed, but... if you are using bandwidth management (HTB), the results after overclocking CPU are very satisfactory: http://www.belliash.eu.org/component/co … 1-wpisy/80 (English translation: http://translate.google.com/translate?h … wpisy%2F80).


Going back to the topic...

Why are you using AR9331 datasheet to explain things like AHB, SPI address space and so on?
I tried to convince you in other topic that using same CPU core in different SoCs doesn't make them (SoCs) the same.

Do you have access to AR9344 datasheet? If not, please explain us in simple words, why are you so certain about maximum address space for SPI in AR9344 (I think that all of us know about limited address space on AR9331 because we have access to datasheet)?

For now, my opinion is similar (16 MB is max in single chip on AR9344), but as long as someone won't confirm this, I'm not as sure as you.

(Last edited by pepe2k on 24 Jun 2013, 15:58)

OK, I think I have just found answer for my question. SPI address space is limited to 16 MB (0x1EFFFFFF ~ 0x1FFFFFFF).
I'm not sure but here is probably the AR9344 address map table:

http://img404.imageshack.us/img404/9317/r8dx.jpg

Source: http://electronix.ru/forum/index.php?showtopic=104465

@Dioptimizer do you know what is "FLASH REMAPPED ADDRES SPACE"?

Dioptimizer wrote:

I'm afraid to answer. This is a question or a test?

https://forum.openwrt.org/viewtopic.php … 23#p193023

It was only a question. Now everything is clear for me.


But I have another question - if there is only one additional reserved 16M block on address space means that we can use only dual flash chip configuration (spi0.0 and spi0.1)?

In your post is information that if we are using more than one flash chip and we want to have access at the same time to the all available space, we need second memory address space block for this. Does it means that configuration with 2x flash chip is the limit?

I think that it could be very helpful to take all the information about limits in flash modification and put them into Wiki. Perhaps it will reduce number of questions about possibility to use 32 MB flash in single chip on these platforms.

So... the bootlog posted in this topic is only a well prepared lie.

(Last edited by pepe2k on 25 Jun 2013, 00:38)

pepe2k wrote:

In your post is information that if we are using more than one flash chip and we want to have access at the same time to the all available space, we need second memory address space block for this. Does it means that configuration with 2x flash chip is the limit?

In fact, we have access to many addresses as in the first Atheros (AR7100 +)

0xbf000000 and 0xbe000000 = 0x9f000000 and 0x9e000000
0xaf000000 and 0xae000000 (not tested maybe it's RAM territory).

Theoretically it can be used for spi0.# (>2).

Because SPI driver (at uboot level) important thing is to address physically different and it can be identified with a particular spi0.#

(Last edited by Dioptimizer on 25 Jun 2013, 02:02)

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