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Topic: TrendNet 16 port PoE Gigabit switch

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I anyone looking at these kind of devices? They seem like a perfect OpenWRT target? At a pretty reasonable price given the port count.

For example, the TrendNET TPE-1620WS is a 16 port gigabit PoE switch, from looking at their firmware I can see that it uses a Marvell MV98DX4122 SoC, which looks to be dual-core 800MHz.  ( … _brief.pdf)

The GPL code is available, and also appears to include crypto acceleration.


The price is certainly beyond my budget. sad

Do you know how much RAM does it have?


The 10 port (8 + 2sfp) version [TPE-1020WS] looks to use the same SoC and is quite a bit cheaper.

I don't think they are that expensive given the port count and potential, certainly if you compare it to other dual-core routers out there. I can see it replacing a switch and smaller router combination and doing everything in one box. If it really is dual-800MHz and has crypto then I think it's worth experimenting with.

The 8MB flash sounds a bit limiting, however I'm not convinced ... I've hacked the squashfs out of their firmware and it's over 8.5MB so my guess is that it's probably 16MB.

Anyway, I think I've convinced myself to buy one (probably the smaller one for now) and try to get a serial port setup.



Ok ... I've got the 10 port version, there is a nice serial port inside ready to attach to.

It has 16MB of flash, and 128MB of memory.

The CPU appears to be running at 500MHz (at least from uboot), there appears to be only one core.

The SoC is MV88F6281, which does include a crypto accelerator. … Source.pdf

I will see if I can get a kernel on from their GPL release and see how I go.

BTW, the standard firmware is awful ... I can't get it to work properly with any browser. I suspect it will need IE ... and I refuse on principle.

         __  __                      _ _
        |  \/  | __ _ _ ____   _____| | |
        | |\/| |/ _` | '__\ \ / / _ \ | |
        | |  | | (_| | |   \ V /  __/ | |
        |_|  |_|\__,_|_|    \_/ \___|_|_|
 _   _     ____              _
| | | |   | __ )  ___   ___ | |_ 
| | | |___|  _ \ / _ \ / _ \| __| 
| |_| |___| |_) | (_) | (_) | |_ 
 \___/    |____/ \___/ \___/ \__|  ** LOADER **
 ** MARVELL BOARD: DB-98DX4122-48G (Rev 2) LE (configured)
 ** Linux        - LE/BE support
 ** vxWorks(elf) - LE/BE support

U-Boot 1.1.4 (Jun  5 2013 - 10:37:15) Marvell version: 5.3.4_0006

U-Boot code: 01200000 -> 0126C700  BSS: -> 0127E398
IRQ Stack: 009fff7c
FIQ Stack: 009fef7c

Soc: MV88F6281 Rev 3 (DDR2)
CPU running @ 500Mhz L2 running @ 250Mhz
SysClock = 250Mhz , TClock = 167Mhz 

DRAM CAS Latency = 5 tRP = 4 tRAS = 12 tRCD=4
DRAM CS[0] base 0x00000000   size 128MB 
DRAM Total size 128MB  16bit width
[16384kB@f8000000] Flash: 16 MB
Addresses 30M - 0M are saved for the U-Boot usage.
Mem malloc Initialization (30M - 22M): Done

CPU : Marvell Feroceon (Rev 1)

Streaming disabled 
Write allocate disabled

USB 0: host mode
Net:   egiga0 [PRIME], ppsdma
Un-Protect Flash Bank # 1
................................................................................................................................................................................................................................................................ done
Hit any key to stop autoboot:  0 
Verifying Checksum ... 
OS/FS Version:...OK
## Booting image at f8100000 ...
   Image Name:   Linux-
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    1272972 Bytes =  1.2 MB
   Load Address: 00008000
   Entry Point:  00008000
   Verifying Checksum ... OK

Checking for Linux kernel endianess at 0xf8100040 = 0xe1a00000
Linux Kernel is LE

Starting kernel in LE mode ...
..Linux version (sw2@guixue) (gcc version 4.2.1) #20 Wed Jun 5 10:41:18 CST 2013
CPU: ARM926EJ-S [56251311] revision 1 (ARMv5TE), cr=00053977
Machine: Feroceon-KW
Using UBoot passing parameters structure
BoardID from uboot=10
Memory policy: ECC disabled, Data cache writeback
calling iotable_init. MEM_TABLE=
  virt=0xe7c00000, phys=0x07c00000, lengh=0x00400000
  virt=0xe8000000, phys=0xe8000000, lengh=0x08000000
  virt=0xf1000000, phys=0xf1000000, lengh=0x00100000
  virt=0xf8000000, phys=0xf8000000, lengh=0x01000000
  virt=0xf4000000, phys=0xf4000000, lengh=0x04000000
  virt=0xfb000000, phys=0xfb000000, lengh=0x00010000
  virt=0xf2000000, phys=0xf2000000, lengh=0x00010000
Internal prestera id register = 0x000e4203
xCat revision = A1
CPU0: D VIVT write-back cache
CPU0: I cache: 16384 bytes, associativity 4, 32 byte lines, 128 sets
CPU0: D cache: 16384 bytes, associativity 4, 32 byte lines, 128 sets
Built 1 zonelists.  Total pages: 31496
Kernel command line: root=/dev/mtdblock3 rw rootfstype=squashfs user_debug=31 ip= console=ttyS0,115200 mtdparts=spi_flash:0x00080000(uboot),0x00080000(env),0x00200000(kernel),0x00b00000(rootfs),0x00200000(jffs2) ethaddr=00:14:d1:2a:01:81 issstart=1 csb=0x0320F5B7 cso=0x0A382A28 csf=0x4891FBBE
PID hash table entries: 512 (order: 9, 2048 bytes)
Console: colour dummy device 80x30
Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
Memory: 124MB 0MB 0MB 0MB = 124MB total
Memory: 123008KB available (2396K code, 260K data, 80K init)
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
NET: Registered protocol family 16

CPU Interface
SDRAM_CS0 ....base 00000000, size 128MB 
SDRAM_CS1 ....disable
SDRAM_CS2 ....disable
SDRAM_CS3 ....disable
PEX0_MEM ....base e8000000, size 128MB 
PEX0_IO ....base fc000000, size   1MB 
INTER_REGS ....base f1000000, size   1MB 
NFLASH_CS ....base d8000000, size 128MB 
SPI_CS ....base f8000000, size  16MB 
CRYPT_ENG ....base fb000000, size  64KB 
SAGE_UNIT ....base f4000000, size  64MB 

  Marvell Development Board (LSP Version KW_LSP_5.3.4_00030)-- DB-98DX4122-48G  Soc: MV88F6281 Rev 3 LE

 Detected Tclk 167000000 and SysClk 0 
Switch decoding windows init is done.
MV Buttons Device Load
PEX not supported
Time: kw_clocksource clocksource has been installed.
NET: Registered protocol family 2
IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
TCP established hash table entries: 4096 (order: 3, 32768 bytes)
TCP bind hash table entries: 4096 (order: 2, 16384 bytes)
TCP: Hash tables configured (established 4096 bind 4096)
TCP reno registered
Use the XOR engines (acceleration) for enhancing the following functions:
  o RAID 5 Xor calculation
  o kernel memcpy
  o kenrel memzero
Number of XOR engines to use: 2
MV Buttons Driver Load
squashfs: version 3.3 (2007/10/31) Phillip Lougher
squashfs: LZMA suppport for by jro
JFFS2 version 2.2. (NAND) © 2001-2006 Red Hat, Inc.
io scheduler noop registered
io scheduler anticipatory registered (default)
Serial: 8250/16550 driver $Revision: $ 4 ports, IRQ sharing disabled
serial8250.0: ttyS0 at MMIO 0xf1012000 (irq = 33) is a 16550A
serial8250.0: ttyS1 at MMIO 0xf1012100 (irq = 34) is a 16550A
Marvell Gbe Ethernet Driver not supported
NFTL driver: nftlcore.c $Revision: $, nftlmount.c $Revision: $
SPI Serial flash detected @ 0xf8000000, 16384KB (256sec x 64KB)
5 cmdlinepart partitions found on MTD device spi_flash
Creating 5 MTD partitions on "spi_flash":
0x00000000-0x00080000 : "uboot"
0x00080000-0x00100000 : "env"
0x00100000-0x00300000 : "kernel"
0x00300000-0x00e00000 : "rootfs"
0x00e00000-0x01000000 : "jffs2"
mice: PS/2 mouse device common for all mice
i2c /dev entries driver
TCP cubic registered
NET: Registered protocol family 1
NET: Registered protocol family 17
IP-Config: Device `eth0' not found.
VFS: Mounted root (squashfs filesystem) readonly.
Freeing init memory: 80K
Using /lib/modules/mvKernelExt.ko
Using /lib/modules/mvPpDrv.ko

presteraSmi_init: Init OK!
DMA - dma_area: 0xe7c00000 ,dma_base: 0x7c00000, dma_len: 0x400000
Thu Jan 20 19:54:00 UTC 2011

Linux MARVELL_LINUX #20 Wed Jun 5 10:41:18 CST 2013
/mnt/flash/sslservcert is existed

Starting System Root TaskDevice[0] ID 0xE42011AB revision 3
. [OK]

MAC Address : 00-14-D1-2A-01-81
H/W Version : 1.0R
F/W Version : 1.00.10

         CAMEO L2 Management Switch 

TPE-1020WS login:

May I ask what you pay for the 10 port switch and where you bought it?

Newegg has this switch for just under USD 250 on their website. Trend likes to charge you just under USD 330 if you order with them.

Is it possible to post home-made pictures or post links from FCC?

This is a nice target to make it to a SOHO box. Like server and router and switch all together.
It must have USB (boot messages), but no specs about a port on the outside on Trend's product pages.
Without a USB port the SOHO market will be limited for server use.

On the stock s/w are the VLANS configurable per port? As in tagged-VLAN on the trunk/uplink to one dedicated port (untagged) on the switch?
If yes, that would be great, because most WiFi routers have a bridge and can't be configured per physical port.

I'm afraid the devs need the device to do their work, and most likely it wil not return.

Thanks for the find OP.

Hi merlin,

I bought it from the UK for GBP173 including tax. (

I will post some pictures when I get a chance (probably at the weekend.)

It doesn't have any external ports other than power, a reset button, and the network ports. The console messages come from an internal serial port, it's easy to find and has a header already soldered, so it's easy to use if you have a usb->ttl (actually it's 3.3v) serial cable.

The SoC certainly has usb capability, but it's not clear if any of the pins are accessible.

For me USB is not important ... I'm looking for a single device that can handle my switching needs and also run OpenWRT as my pppoe/IPsec/tinc router. I am hoping that the crypto acceleration means that the 500Mhz CPU (although it may be faster than that) will be enough. I currently use a 680MHz device with no acceleration and it struggles.

On the stock s/w you can indeed configure VLAN's per port, it's basically a managed switch and seems to have all the capabilities you would expect. The stock firmware isn't good with different browsers ... crome and firefox just don't work, safari seems ok though -- although I haven't played much with this.

I have managed to get the GPL kernel to build and run on the switch and even getting NFS root mostly working, they seem to have provided for standalone "GPL" use and the switch ports seem to be accessible, although I'm not entirely sure how that will all play out.

The biggest problem looks to be that their additions to the kernel are pretty significant and may be difficult to port to a more sensible kernel version. Anyway, messing with this is going to be my project for the next few weeks!

BTW, most of the Wifi routers I've used have a switch that can be configured per port, I'm not sure which ones you use, but certainly the Buffalo ones have been very effective for me.




Thanks for your reply, very helpfull and I'm looking forward to the pictures.

I'm especially happy with the comment on the VLAN in relation to Buffalo wifi routers. (Off-topic, sorry, it will happen only once): The Buffalo WZR-HP-G450H is a router available here (SE Asia), is that one of the VLAN capable router you mentioned (as far as you know)?

At stock s/w on the console does it allows you to enter commands and/or Busybox shell? Telnet access?
I look forward to any further development.



Hi merlin,

I haven't use the WZR-HP-G450H personally ... I prefer the WZR-HP-AG300H but it's now quite difficult to get hold of.

I would expect the G450H to be as capable though.

As far as shell access ... it depends if it's one of the devices that ships with ddwrt as standard ... in any case I would reflash with openwrt, it's pretty easy to do.


(Last edited by essele on 2 Mar 2014, 05:23)

Further progress ... on a couple of fronts.

1. It seems that there are quite a few devices using this same chipset, my favourite at this point is the D-Link DGS-1210-28, I'm guessing based on the GPL code download, but it's a 28-port switch with no PoE, and it's only about GBP100! The PoE version (-28P) is also pretty good value.

2. It seems that the 3.10.32 kernel (used with OpenWRT trunk) has quite a bit of support for various bits of the SoC, the CPU is pretty well covered (although this is a different variant) ... I've managed to get a standard kernel booted.

They seem to have used an illegal board number, so you have to hack that to get it to boot, but the serial console works fine. (It's not a Marvell Development Board, I just used that to see if it would boot.)

I haven't done much with the .config, so there's loads of stuff here that shouldn't be, also I haven't done anything with a rootfs ... I've been using NFS, but that's not going to work until the network is up and running ... and I think that will take some considerable time.


Starting kernel in LE mode ...
Uncompressing Linux... done, booting the kernel.
Booting Linux on physical CPU 0x0
Initializing cgroup subsys cpuset
Initializing cgroup subsys cpu
Initializing cgroup subsys cpuacct
Linux version 3.10.32 (XXXXX) (gcc version 4.6.4 (OpenWrt/Linaro GCC 4.6-2013.05 r39757) ) #4 Sun Mar 2 16:09:09 GMT 2014
CPU: Feroceon 88FR131 [56251311] revision 1 (ARMv5TE), cr=00053977
CPU: VIVT data cache, VIVT instruction cache
Machine: Marvell DB-88F6281-BP Development Board
Ignoring unrecognised tag 0x41000403
bootconsole [earlycon0] enabled
Memory policy: ECC disabled, Data cache writeback
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 32512
Kernel command line: console=ttyS0,115200 earlyprintk=serial,uart0,115200 csb=0x0320F5B7 cso=0x0A382A28 csf=0x4891FBBE
PID hash table entries: 512 (order: -1, 2048 bytes)
Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
Memory: 128MB = 128MB total
Memory: 122536k/122536k available, 8536k reserved, 0K highmem
Virtual kernel memory layout:
    vector  : 0xffff0000 - 0xffff1000   (   4 kB)
    fixmap  : 0xfff00000 - 0xfffe0000   ( 896 kB)
    vmalloc : 0xc8800000 - 0xff000000   ( 872 MB)
    lowmem  : 0xc0000000 - 0xc8000000   ( 128 MB)
    modules : 0xbf000000 - 0xc0000000   (  16 MB)
      .text : 0xc0008000 - 0xc05bbf14   (5840 kB)
      .init : 0xc05bc000 - 0xc060a8d4   ( 315 kB)
      .data : 0xc060c000 - 0xc0660e28   ( 340 kB)
       .bss : 0xc0660e28 - 0xc07311f0   ( 833 kB)
sched_clock: 32 bits at 166MHz, resolution 5ns, wraps every 25769ms
Console: colour dummy device 80x30
Calibrating delay loop... 498.89 BogoMIPS (lpj=2494464)
pid_max: default: 32768 minimum: 301
Security Framework initialized
SELinux:  Initializing.
Mount-cache hash table entries: 512
Initializing cgroup subsys devices
Initializing cgroup subsys freezer
Initializing cgroup subsys net_cls
Initializing cgroup subsys blkio
Initializing cgroup subsys perf_event
Initializing cgroup subsys net_prio
CPU: Testing write buffer coherency: ok
ftrace: allocating 18057 entries in 53 pages
Setting up static identity map for 0xc04272c8 - 0xc0427304
devtmpfs: initialized
pinctrl core: initialized pinctrl subsystem
regulator-dummy: no parameters
NET: Registered protocol family 16
DMA: preallocated 256 KiB pool for atomic coherent allocations
Kirkwood: Device-Unknown, TCLK=166666667.
Feroceon L2: Enabling L2
Feroceon L2: Cache support initialised.
MPP setup: unknown kirkwood variant (dev 0xe420 rev 0x3)
Kirkwood PCIe port 0: link down
PCI: bus0 uses PCIe port 0
PCI host bridge to bus 0000:00
pci_bus 0000:00: root bus resource [mem 0xe0000000-0xe7ffffff]
pci_bus 0000:00: root bus resource [io  0x1000-0xffff]
pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
PCI: bus0: Fast back to back transfers disabled
bio: create slab <bio-0> at 0
vgaarb: loaded
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
NetLabel: Initializing
NetLabel:  domain hash size = 128
NetLabel:  protocols = UNLABELED CIPSOv4
NetLabel:  unlabeled traffic allowed by default
Switching to clocksource orion_clocksource
NET: Registered protocol family 2
TCP established hash table entries: 1024 (order: 1, 8192 bytes)
TCP bind hash table entries: 1024 (order: 0, 4096 bytes)
TCP: Hash tables configured (established 1024 bind 1024)
TCP: reno registered
UDP hash table entries: 256 (order: 0, 4096 bytes)
UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
NET: Registered protocol family 1
Initialise module verification
audit: initializing netlink socket (disabled)
type=2000 audit(0.450:1): initialized
bounce pool size: 64 pages
VFS: Disk quotas dquot_6.5.2
Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)
msgmni has been set to 239
Key type asymmetric registered
Asymmetric key parser 'x509' registered
Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252)
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
ipmi message handler version 39.2
IPMI System Interface driver.
ipmi_si: Adding default-specified kcs state machine
ipmi_si: Trying default-specified kcs state machine at i/o address 0xca2, slave address 0x0, irq 0
ipmi_si: Interface detection failed
ipmi_si: Adding default-specified smic state machine
ipmi_si: Trying default-specified smic state machine at i/o address 0xca9, slave address 0x0, irq 0
ipmi_si: Interface detection failed
ipmi_si: Adding default-specified bt state machine
ipmi_si: Trying default-specified bt state machine at i/o address 0xe4, slave address 0x0, irq 0
ipmi_si: Interface detection failed
ipmi_si: Unable to find any System Interface(s)
Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
serial8250.0: ttyS0 at MMIO 0xf1012000 (irq = 33) is a 16550A
console [ttyS0] enabled, bootconsole disabled
console [ttyS0] enabled, bootconsole disabled
Non-volatile memory driver v1.3
brd: module loaded
loop: module loaded
libphy: Fixed MDIO Bus: probed
ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
ehci-pci: EHCI PCI platform driver
ehci-orion: EHCI orion driver
orion-ehci orion-ehci.0: EHCI Host Controller
orion-ehci orion-ehci.0: new USB bus registered, assigned bus number 1
orion-ehci orion-ehci.0: irq 19, io mem 0xf1050000
orion-ehci orion-ehci.0: USB 2.0 started, EHCI 0.00
usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb1: Product: EHCI Host Controller
usb usb1: Manufacturer: Linux 3.10.32 ehci_hcd
usb usb1: SerialNumber: orion-ehci.0
hub 1-0:1.0: USB hub found
hub 1-0:1.0: config failed, hub doesn't have any ports! (err -19)
ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
uhci_hcd: USB Universal Host Controller Interface driver
mousedev: PS/2 mouse device common for all mice
cpuidle: using governor ladder
cpuidle: using governor menu
hidraw: raw HID events driver (C) Jiri Kosina
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
drop_monitor: Initializing network drop monitor service
TCP: cubic registered
Initializing XFRM netlink socket
NET: Registered protocol family 17
Loading module verification certificates
MODSIGN: Loaded cert 'Magrathea: Glacier signing key: e73ed205fcdf0e437806f385e9da3db6eb724f62'
registered taskstats version 1
IMA: No TPM chip found, activating TPM-bypass!
drivers/rtc/hctosys.c: unable to open rtc device (rtc0)
md: Waiting for all devices to be available before autodetect
md: If you don't use raid, use raid=noautodetect
md: Autodetecting RAID arrays.
md: Scanned 0 and added 0 devices.
md: autorun ...
md: ... autorun DONE.
VFS: Cannot open root device "(null)" or unknown-block(0,0): error -6
Please append a correct "root=" boot option; here are the available partitions:
Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0)
CPU: 0 PID: 1 Comm: swapper Not tainted 3.10.32 #4

(Last edited by essele on 2 Mar 2014, 18:26)


Congratulations on the progress so far.

You mentioned you had to tweak a bit to get the Linux kernel booting "They seem to have used an illegal board number, so you have to hack that to get it to boot, but....".
Be so kind to post the diff (for the Linux kernel) and/or u-boot env settings, so others can benefit from your effort.



Hi merlin,

Yes ... good point!

This is very hacky at this point, but I basicalled selected the "db88f6281_bp" board type in the config, which has a machine type of 1680, however this particular board appears to have a machine type of 527.

These are defined in arch/arm/tools/mach-types. In 3.10.32 machine type 527 isn't defined at all, however on the golden source (see top of file) it's defined as pxa_mpm10 (which I don't think is this board.)

There could be another reason though ... it's not clear to me that this version of u-boot actually passes the machine type, therefore this could just be a register setting through whatever mechanism they do use. I don't have access to the u-boot source so really can't tell.

Their supplied GPL kernel actually passes a u-boot struct through with some limited info in it, but it doesn't match any of this stuff. I haven't done enough digging to really understand it.

In any case, hacking the mach-types file works nicely...

#db88f6281_bp       MACH_DB88F6281_BP   DB88F6281_BP        1680
db88f6281_bp        MACH_DB88F6281_BP   DB88F6281_BP        527

EDIT: Actually I've just found this in the trendnet GPL code, so it does look like they use the machine-type concept, they just haven't used official numbers...

feroceon_orion      ARCH_FEROCEON_ORION FEROCEON_ORION      526
feroceon_kw     ARCH_FEROCEON_KW    FEROCEON_KW     527
feroceon_mv78xx0    ARCH_FEROCEON_MV78XX0   FEROCEON_MV78XX0    528

If you use 'earlyprintk' you'll get some extra debugging ... you can see my chosen command line argument from the boot listing above.

I'm now starting to work through the boot and understand and resolve the key problems. For example, the standard linux code uses a mechanism to identifty the kirkwood variant that doesn't work on this chip. The GPL code uses a different method (which is also described in the 88F8281 datasheet) so that should be easy to fix.

Looking at the code, the plat-orion code seems to cover a lot of the stuff needed for the basics (inc. flash and even crypto), so I don't think this is going to be that tough. The bigger problem will be with the switch, where I'm definitely way out of my comfort zone!



(Last edited by essele on 3 Mar 2014, 11:15)


Is there any progress on the production of pictures of the switch?
In the mean time I try to produce a kernel for you to test, but got stuck while compiling it.
The idea is to get the network (on chip) working, so you might be able to mount an nfs share as rootfs, so you don't touch the OEM image.

Untill now further way than ever, with this compile error.

I will keep you posted.



Hi Merlin,

Sorry, I got sidetracked and completely forgot the pictures, I'll post shortly.

I already have a kernel built and running fine... the serial ports, the flash (mtd) and the crypto all seem to be fine with a stock kernel, with just one minor patch to ensure the SoC is properly identified.

I'm working on porting the Prestera switch driver, which is going ok, but will take some time as I'm trying not to introduce any of the other Marvell code if possible.

Also I've switched to the 'device-tree' approach which better solves the board-id problem from before.

I'm also using a memory based root file system so I can experiment without messing with the flash ... nfs will be some time!

I'll post instructions once I get things to a stable state.



Hey there.

I like very much what you're doing here. Just grep a device that seems to fit OpenWRT and hack till it works. I really appreciate this.

But if it's about the price: Well, then using any 4*1GBit OpenWRT device in conjunction with a cheap 24 port vlan switch should be somehow cheaper.

* TP-Link TL-WDR4300 goes for ~60€
* TP-Link TL-SG2424 goes for ~130€

That's significantly cheaper then the TrenNET TPE-1620WS, which is available for 330€ here in germany. That's nearly 50% cheaper, and I gues you need to run that configuration for about 20 years until energy prices make it more expensive after all.

The only disatvantage I can see is the fact that the OpenWRT is only connected by a single GBit lane, but maybe the routes switch can use all 4 ports as on aggregated interface.

Don't get me wrong. The TrendNET thingy seems nice, and when you wanna play around and raise the number of devices being supported by OpenWRT it's a really really great job to do. But since you initially mentioned the price, I'm going to think that's kind of the wrong direction.



Your firmware progress sounds very promissing. I still continue, just for the learning experience.
You are absolutely right about NFS and ramdisk.
I look forward to the pictures and firmware build info.


Thank you for your comments and interest in this project/thread.

The 24 ports is rather expensive, we admit. But the 10 port (now work in progress) has a totally different pricetag.
As a sidenote, please realize we talk about PPOE enabled switches Those models are rather low in numbers.
Using a non-PPOE switch with a power injector (one per port) is not a very cost effective solution either. And I better not start about the looks with all those single units.

Openwrt is about freedom and choice, and that is the spirit of this project (attempting) porting Openwrt to a switch.
And in my case, leaving options open for a hardware mod on top of that (USB on the outside).




golialive wrote:

* TP-Link TL-WDR4300 goes for ~60€
* TP-Link TL-SG2424 goes for ~130€

Yes, you are right, however it's not entirely about cost ... neither of these devices would be able to run a high performance IPSEC tunnel for example (my more powerful WZR-AG300H maxes out about 50MB/s with only SHA1 hashing and no encryption.) And neither of them have PoE as merlin has pointed out.

PoE really adds to the cost, the non-PoE versions are much cheaper ... I will probably have a look at some options once I have this working ... there seem to be two or three common chipsets, all with GPL code.

There may not be mass appeal for this kind of solution, but most of the support is already in Linux so it seems an interesting option to explore.



I am conscious that I still haven't managed to get some good photo's online, so I have created a Wiki page on the OpenWRT wiki and added one photo that at least shows the serial port and some of the internals.




Thanks for the Wiki page including the picture.
The one thing you didn't mentioned on the Wiki page was a link to this thread.

In the mean time I keep on learning how to build OpenWrt images and packages, and thanks to your Wiki page I learned I was using the wrong SoC as target.
One day it will work (somewhat).
Any preliminary  build info would be great.
Any success on the back-port of the switch?

I discussed this project (experiment if you want) with my brother, who's a very security conscious guy and he really liked the project.
A good amount of security equipment including cameras are PoE enabled and that's where he sees a great application for this (kind of) switch/project.

Again, thanks for the good work.



Hi Merlin,

I haven't even started looking at OpenWRT support yet, I'm just working with a stock linux kernel. There will be more stuff to do to get OpenWRT build support working.

I have the switch driver building ok and the switch initialises, but I can't send or receive packets yet ... I'm pretty confident that I'll get it working soon, however the Marvell code is really quite horrible (partially because they use a common framework to support multiple interface types and other non-linux platforms) and I think it will probably need a rewrite.

The packet sending code for example seems to busy-wait for the packet send, which can't be good for performance!

I'll keep this thread updated as I make progress.


Further progress ... there were problems with both interrupts and dma because of major changes between 2.6.x and 3.10.x.

Anyway, the interrupts have been working for a little while, and I've just managed to get dma working for received packets, so I can now receive packets on the device (it's limited to seeing arp packets because transmit isn't working yet.)

I have some concerns about the way its working, but I'll get through those. Next will be to apply the same fixes I used on receive for the transmit side. Once both are working and I have a reference working solution I will rewrite the driver completely I think.



This is great news.
The whole project really start to get some form like this.

One thing does confuse me a bit: if there is a switch driver for 2.6.x, where (who) is the maintainer of this driver?

You mention the current switch driver is a busy-wait one for Tx. Are you confident you can make a better performing one?
If yes, then you might make a living out of this kind of jobs.

I'm not making much progress and mess around with toolchain and OpenWrt and vanilla kernel.
Nice learning experience it is.

Looking forward to your next progress report.



Hi merlin,

One thing does confuse me a bit: if there is a switch driver for 2.6.x, where (who) is the maintainer of this driver?

It's the GPL code that they provide as part of their GPL commitments, so it's not part of the standard kernel and not maintained outside of whatever they do from a proprietary perspective.

You mention the current switch driver is a busy-wait one for Tx. Are you confident you can make a better performing one?

I'm not really a driver expert, but I've been doing a fair amount of research and I'm confident that this can be structured in a similar way to many of the other Linux network drivers, including some of the performance optimisations. The GPL code is pretty horrible, but mostly because they seem to have a common code base for other implementations. Once you strip out that requirement it's easier to make the code simple and efficient.

If yes, then you might make a living out of this kind of jobs.

LOL. I doubt it! There are far more talented people out there than me, especially in this area. I'll stick with mushroom farming. ;-)


More progress ... I had some intermittent issues with the receive code whilst trying to update the GPL driver, so I decided to start again with a clean version. But I then discovered that the existing Marvell mv643xxx_eth driver has mostly the same logic and I'd just need to rework slightly because of a different approach to registers, interrupts, and descriptors.

Anyway, new code, mostly clean of the original Marvell GPL code (only a few small routines left to port) and receive is now 100% solid. I can now get to the transmit code which should be simple because most of the work is done. Also, this driver is napi compliant so we should see significant improvements over the GPL one.

I've also managed to get a self-built kernel to run with the standard firmware from the switch which means I can build hooks to dump various registers at various times to try to work out some of the unknowns (vlan configs, DSA header control etc, PoE.)


Lee / Essele,

This is really big news (and that for a mushroom farmer).

Now that you can peek into the self-compiled  OEM kernel, the chance all the old functions can be implemented using OpenWRT in the end are really high.

Also congratulations on the Rx code and close to free of Marvell's NDA code.

It's time to look for a supplier for this 10-port box to get my hand dirty in the coming month or so.

My efforts stay mainly fruitless of result, but the learning is great.

Keep up the good work,


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