After discovering that already published clock frequencies above 240mhz were not being actually applied on my WRT54Gv4 and WRT54Gv5, I did some research to discover why. It turns out that these have r0.8 of the BCM5352/3302 processor instead of r0.7 and end up using a different table in sbmips.c.
This different table means they have a different set of valid clock frequencies. Also, their default CFEs behave differently in that they handle invalid clock frequencies gracefully by finding the next closest valid match. Frequencies above the maximum of 250mhz end up with the processor clock not changed, or set to default, depending if a power cycle was performed (I think).
DD-WRT's web UI reports the clock frequency as that indicated by the nvram variables, meaning all those people who use that firmware and think they've overclocked t 252mhz or above are actually running at the default speed of 200mhz.
Furthermore, since the clock ratio between CPU and SB is fixed on these boxes, the sbclock is ignored if supplied in the clkfreq value (the second part, after the comma).
The highest valid frequency for these boxes is 250/125, CPU and SB clock, respectively.
I've posted this new information and complete valid frequency list in the WRT54G wiki page, though it also may pertain to GS models:
http://wiki.openwrt.org/OpenWrtDocs/Har … 8wrt54g%29
To verify your actual clock frequency, use 'cat /proc/cpuinfo' or 'dmesg'. Do not rely on nvram variables for the above stated reasons.