OpenWrt Forum Archive

Topic: [MT7621A]WiTi Board is coming. Do you want to hack it?

The content of this topic has been archived between 8 Feb 2018 and 3 May 2018. Unfortunately there are posts – most likely complete pages – missing.

pepe2k wrote:

Take a look at: https://lite.turris.cz/en/

Not bad. However, I do not like this one:
>less than USD 200 for premium model and USD 100 for basic version<
So, not a big difference to APU regarding price for a "Maxi Board",
but too expensive for a "Mini Board", used in a consumer product.

augustus_meyer wrote:
pepe2k wrote:

Take a look at: https://lite.turris.cz/en/

Not bad. However, I do not like this one:
>less than USD 200 for premium model and USD 100 for basic version<
So, not a big difference to APU regarding price for a "Maxi Board",
but too expensive for a "Mini Board", used in a consumer product.

From what I know, premium version might have ac Wi-Fi card in bundle (PCE apu1x doesn't have any Wi-Fi bundled, it's just a motherboard - of course, it's faster... it's totally different architecture). Plus, enclosure, power supply... for apu1x you need to buy that things, so if you want to compare prices here, you should include price of Wi-Fi cards, enclosure and power supply in apu1x price. Same in WiTi vs. apu1x - on WiTi board you have 2x Wi-Fi cards, on apu1x... none (even if that MediaTek chips based mPCIe cards would cost like 10 USD per one, it's still 20 USD difference).

And I think Turris Lite should be compared with WRT1200AC, it's same hardware platform, not with apu1x.

Sugar,

Which build of OpenWRT currently works with this board? I bought one, and am worried it wouldnt work with the Open/DD-WRT builds.

Do you have plans to support DD-WRT as well, or only OpenWRT?

Please dont remove the SATA ports, its a very cool idea.

Dont change your design plans for a few users on this forum, making a MiniWiTi is a great idea without SATA, but the original design should stay.

As far as cases go, I'm sure you can find a 3d printable design somewhere and cannibalize it for the WiTi router.

The antennas seems dinky quality, perhaps bigger antennas and 2-3 USB 3.0 ports (1x for a printer, 1x for HDD etc..)

a radio on/off toggle button and being able to disable the LEDs in "Stealth mode" would be cool.

Perhaps adding a eMMC module instead of MicroSD to run a native Android/*nix installation would help?

Food for thought.

I don't think printers are that bandwidth hungry they need a USB3 port, are they?

Borromini wrote:

I don't think printers are that bandwidth hungry they need a USB3 port, are they?

most of hp printers work on USB1

sugar wrote:
frietpan wrote:

Are the schematics available?
is it more open then cubie-things?
Does WiTi actually do active support or is it up to the users to figure it all out?

Yeah, you can download it from ftp server:
http://ftp.mqmaker.com/WiTi/Docs/Hardware/

It will open whole source code what Mediatek offers include wifi driver.
Actively support it.


Those data sheets are not useful for developers.
We need the programming guide, thanks.

I think than 1 wan & 4 lan is optimal. Your second wan that uses RGMII is not good idea, you cut lan-wan bandwidth twice. I think the second desing is needed 2 usb, 1-2 sata. 1 wan, 4 lan + rtc + 512 MB ram.

http://www.haixiaol.com/n388099.html 

Chinese Newifi 2 review, 7621a without SATA.

price: 300rmb (about 50USD)

You can tell the management interface is based on luci, see pics in above thread (in Chinese).

(Last edited by sevenwt on 14 Sep 2015, 10:14)

sugar wrote:
alphasparc wrote:

Hardware NAT Code for SOC with Integration with OpenWRT?
Dual WAN is awesome but you will never achieve 1/2GBps without Hardware NAT.

Of course! It have Hardware NAT function, you can select it by menuconfig.
Its source code have been published on github.
https://github.com/mqmaker

alphasparc wrote:

Also good to post some benchmark on with HW NAT and no HW NAT.
I am considering buying but I don't want to risk experience the incomplete board feeling where it looks good on paper but lackluster delivery.


I had a look through the WiTi code and I am not quite sure HW_NAT will work. I am far from an expert but when I compare it with certain other source trees it seems to me that substantial parts of the code are missing in your project.
I am currently fiddling around with Chaos Calmer on an RE6500  and can get roughly 600-750* Mbits/s throughput. (using iperf on two linux machines ... so far no pppoe simulation on the "outside" interface) If you could make a patch against CC I could do some more benchmarks.

Besides: The new Edge Router X, which uses also an MT7621 is rumored to have no Hardware NAT. It might be that Ubiquiti will deliver an updated firmware sooner or later but I can't stop wondering if the whole NAT accelerator thing is just a half-heartedly implemented marketing gag.

*: Please don't nail me on these numbers. I tested this a few weeks back and didn't take logs. The rather huge variation comes from the linux kernel scheduler, unfortunately all four virtual cores are scheduled equal. I the corner case of one continous stream the connection has a 50/50 chance to end up on one physical core, so you get an substantial performance penalty. EDIT: Another thing. The RE6500 is a repeater and has no dedicated WAN interface, so performance might be different(=better) on WiTi or other comparable hardware.

(Last edited by M.Bastian on 18 Sep 2015, 12:57)

bump **

I believe this board should be in ToH, is that correct?

mucha wrote:

bump **

I believe this board should be in ToH, is that correct?

I'm working to port it to mainline OpenWRT. I just received the board yesterday and we need to define its own profile in ramips target but the information provided so far is not enough, further work is needed.

nitroshift

(Last edited by nitroshift on 14 Nov 2015, 09:43)

Will buy this board if
1)They have a proper casing for it, not an art admirer of PCB boards
2)Proper compilable from Source, Hardware NAT implementation
Keep up the gd work.

@alphasparc

While I may agree on your first point, on the second one I must tell you that OpenWRT will not mainline a hardware dependent NAT acceleration feature. Of course, you are free to branch and develop it yourself.

nitroshift

alphasparc wrote:

Will buy this board if
1)They have a proper casing for it, not an art admirer of PCB boards
2)Proper compilable from Source, Hardware NAT implementation
Keep up the gd work.

I know that this is a matter of personal taste, but for 2) I would prefer a unit that allows wire-speed NAT/firewalling/traffic-shaping just using the CPU, if hw-nat is required, the cpu is under-provisioned in my interpretation wink (I fully agree on the princip;e that a router should be able to comfortably perform at the relevant speeds customers get nowadays...)

Best Regards
       M.

nitroshift wrote:
mucha wrote:

bump **

I believe this board should be in ToH, is that correct?

I'm working to port it to mainline OpenWRT. I just received the board yesterday and we need to define its own profile in ramips target but the information provided so far is not enough, further work is needed.

nitroshift

Since there's no device tree file available, we have to rely on whatever info we can gather from the running firmware. However,  OpenWRT does have a compatible ramips target, porting witi shouldn't be too hard. As soon as I get a working firmware I will push the patches and ask the target maintainer to commit them to trunk.

nitroshift

(Last edited by nitroshift on 15 Nov 2015, 19:51)

can someone please post a working image ?
mine fails to build

LE: found it
http://ftp.mqmaker.com/WiTi/Firmware/

(Last edited by maurer on 16 Nov 2015, 21:11)

As stated on mqmaker forums, I managed to compile a working firmware image for the board based on trunk revision 47440. We should have it upstreamed soon. For those who want to give the firmware a spin, it's available here: https://github.com/nitroshift/witi/blob … pgrade.bin

nitroshift

(Last edited by nitroshift on 17 Nov 2015, 14:22)

I really wish I knew more on building OpenWRT, as I'm not a developer.
I just received a board - I was wondering if I can help in any way, and if so - where would be a good point to start to read about this?

There's a few people on #openwrt on freenode who are hacking on the board together, nitroshift s patches are minimal and it shouldn't take too long before trunk ends up supporting WiTi.

If I was hard pressed to guess, probably by next weekend (2015-11-20) there should be an official trunk image, and image builder release, built by buildbot and downloadable from the servers, +/- a day or two.

I'm not sure if sata and all that will be supported with the initial check in, I'd rather get the basic support in sooner and work on additional peripheral support as we go.
The source code we got from mqmaker was based on a year old openwrt, that was then heavily modified even before mqmaker guys got it and started to work on it and figuring out what peripheral is attached where and which driver has what kind of support across mqmaker/openwrt/linus's kernel takes a bit of effort to track down.

Which use cases for the board would you like to see supported first?

@risk

Sata ports are working with firmware I posted above.

nitroshift

Hi Nitroshift,

Few questions:
1)Is the SoC hot to the touch in operation?
2)NAT performance? https://wiki.openwrt.org/inbox/benchmark.nat
3)Wireless performance? (N,AC,Range,2.4GHZ,5GHZ)
4)Any operational hardware bugs you can nitpick?
5)dmesg logs (answered don't put it on pastebin)

=~=~=~=~=~=~=~=~=~=~=~= PuTTY log 2015.11.16 08:25:53 =~=~=~=~=~=~=~=~=~=~=~=
 
 
===================================================================
 
     MT7621   stage1 code 10:33:55 (ASIC)
 
     CPU=500000000 HZ BUS=166666666 HZ
 
==================================================================
 
Change MPLL source from XTAL to CR...
 
do MEMPLL setting..
 
MEMPLL Config : 0x31100000
 
3PLL mode + External loopback
 
=== XTAL-40Mhz === DDR-800Mhz ===
 
PLL3 FB_DL: 0x3, 1/0 = 569/455 0D000000
 
PLL2 FB_DL: 0x10, 1/0 = 647/377 41000000
 
PLL4 FB_DL: 0x14, 1/0 = 599/425 51000000
 
do DDR setting..[01F40000]
 
Apply DDR3 Setting...(use customer AC)
 
          0    8   16   24   32   40   48   56   64   72   80   88   96  104  112  120
 
      --------------------------------------------------------------------------------
 
0000:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
 
0001:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
 
0002:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
 
0003:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
 
0004:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
 
0005:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
 
0006:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
 
0007:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
 
0008:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
 
0009:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
 
000A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
 
000B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
 
000C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
 
000D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
 
000E:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
 
000F:|    0    0    0    0    0    0    0    0    1    1    1    1    1    1    1    1
 
0010:|    0    1    1    1    1    1    1    1    1    1    1    1    1    1    1    1
 
0011:|    1    1    1    1    1    1    1    0    0    0    0    0    0    0    0    0
 
0012:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
 
0013:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
 
0014:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
 
0015:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
 
0016:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
 
0017:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
 
0018:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
 
0019:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
 
001A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
 
001B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
 
001C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
 
001D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
 
001E:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
 
001F:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
 
rank 0 coarse = 16
 
rank 0 fine = 64
 
B:|    0    0    0    0    0    0    0    0    1    1    1    0    0    0    0    0
 
opt_dle value:9
 
DRAMC_R0DELDLY[018]=00003031
 
==================================================================
 
RXDQS perbit delay software calibration
 
==================================================================
 
1.0-15 bit dq delay value
 
==================================================================
 
bit|     0  1  2  3  4  5  6  7  8  9
 
--------------------------------------
 
0 |    11 9 11 11 11 9 11 8 6 7
 
10 |    9 10 7 10 6 9
 
--------------------------------------
 
 
 
==================================================================
 
2.dqs window
 
x=pass dqs delay value (min~max)center
 
y=0-7bit DQ of every group
 
input delay:DQS0 =49 DQS1 = 48
 
==================================================================
 
bitDQS0 bit      DQS1
 
0  (1~96)48  8  (1~93)47
 
1  (1~96)48  9  (1~95)48
 
2  (2~96)49  10  (1~94)47
 
3  (1~96)48  11  (1~91)46
 
4  (1~96)48  12  (1~95)48
 
5  (1~98)49  13  (1~94)47
 
6  (1~96)48  14  (1~96)48
 
7  (1~98)49  15  (1~94)47
 
==================================================================
 
3.dq delay value last
 
==================================================================
 
bit|    0  1  2  3  4  5  6  7  8   9
 
--------------------------------------
 
0 |    12 10 11 12 12 9 12 8 7 7
 
10 |    10 12 7 11 6 10
 
==================================================================
 
==================================================================
 
     TX  perbyte calibration
 
==================================================================
 
DQS loop = 15, cmp_err_1 = ffff0000
 
dqs_perbyte_dly.last_dqsdly_pass[0]=15,  finish count=1
 
dqs_perbyte_dly.last_dqsdly_pass[1]=15,  finish count=2
 
DQ loop=15, cmp_err_1 = ffff0000
 
dqs_perbyte_dly.last_dqdly_pass[0]=15,  finish count=1
 
dqs_perbyte_dly.last_dqdly_pass[1]=15,  finish count=2
 
byte:0, (DQS,DQ)=(8,8)
 
byte:1, (DQS,DQ)=(8,8)
 
20,data:88
 
[EMI] DRAMC calibration passed
 
 
 
 
===================================================================
 
     MT7621   stage1 code done
 
     CPU=500000000 HZ BUS=166666666 HZ
 
===================================================================
 
 
 
U-Boot 1.1.3 (May 17 2015 - 18:53:31)
 
 
Board: Ralink APSoC DRAM:  256 MB
 
relocate_code Pointer at: 8ffb8000
 
 
Config XHCI 40M PLL
 
flash manufacture id: c8, device id 40 18
 
find flash: GD25Q128C
 
============================================
 
Ralink UBoot Version: 4.3.0.0
 
--------------------------------------------
 
ASIC MT7621A DualCore (MAC to MT7530 Mode)
 
DRAM_CONF_FROM: Auto-Detection
 
DRAM_TYPE: DDR3
 
DRAM bus: 16 bit
 
Xtal Mode=3 OCP Ratio=1/3
 
Flash component: SPI Flash
 
Date:May 17 2015  Time:18:53:31
 
============================================
 
icache: sets:256, ways:4, linesz:32 ,total:32768
 
dcache: sets:256, ways:4, linesz:32 ,total:32768
 
 
 ##### The CPU freq = 880 MHZ ####
 
 estimate memory size =256 Mbytes
 
#Reset_MT7530
 
 
Please choose the operation:
 
   1: Load system code to SDRAM via TFTP.
 
   2: Load system code then write to Flash via TFTP.
 
   3: Boot system code via Flash (default).
 
   4: Entr boot command line interface.
 
   7: Load Boot Loader code then write to Flash via Serial.
 
   9: Load Boot Loader code then write to Flash via TFTP.
 
 4  3  2  1  0
 
   
 
3: System Boot system code via Flash.
 
## Booting image at bfc50000 ...
 
   Image Name:   OpenWrt Linux-3.10.14-p112871
 
   Image Type:   MIPS Linux Kernel Image (lzma compressed)
 
   Data Size:    1314596 Bytes =  1.3 MB
 
   Load Address: 80001000
 
   Entry Point:  80001000
 
   Verifying Checksum ... OK
 
   Uncompressing Kernel Image ... OK
 
No initrd
 
## Transferring control to Linux (at address 80001000) ...
 
## Giving linux memsize in MB, 256
 
 
Starting kernel ...
 
 
 
LINUX started...
 
 THIS IS ASIC
[    0.000000] Linux version 3.10.14 (nitroshift@kali) (gcc version 4.8.3 (OpenWrt/Linaro GCC 4.8-2014.04 unknown) ) #4 SMP Sun Nov 15 10:25:42 EET 2015
[    0.000000]
[    0.000000]  The CPU feqenuce set to 880 MHz
[    0.000000] GCMP present
[    0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc)
[    0.000000] Software DMA cache coherency
[    0.000000] Determined physical RAM map:
[    0.000000]  memory: 10000000 @ 00000000 (usable)
[    0.000000] Initrd not found or empty - disabling initrd
[    0.000000] Zone ranges:
[    0.000000]   Normal   [mem 0x00000000-0x0fffffff]
[    0.000000]   HighMem  empty
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x00000000-0x0fffffff]
[    0.000000] Detected 3 available secondary CPU(s)
[    0.000000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
[    0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.000000] PERCPU: Embedded 7 pages/cpu @81203000 s6656 r8192 d13824 u32768
[    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 65024
[    0.000000] Kernel command line: console=ttyS1,57600n8 root=/dev/mtdblock5 rootfstype=squashfs,jffs2
[    0.000000] PID hash table entries: 1024 (order: 0, 4096 bytes)
[    0.000000] Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
[    0.000000] Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
[    0.000000] Writing ErrCtl register=0003c00c
[    0.000000] Readback ErrCtl register=0003c00c
[    0.000000] Memory: 255472k/262144k available (2919k kernel code, 6672k reserved, 710k data, 268k init, 0k highmem)
[    0.000000] Hierarchical RCU implementation.
[    0.000000] NR_IRQS:128
[    0.000000] console [ttyS1] enabled
[    0.120000] Calibrating delay loop... 580.60 BogoMIPS (lpj=1161216)
[    0.160000] pid_max: default: 32768 minimum: 301
[    0.164000] Mount-cache hash table entries: 512
[    0.168000] launch: starting cpu1
[    0.172000] launch: cpu1 gone!
[    0.172000] CPU1 revision is: 0001992f (MIPS 1004Kc)
[    0.172000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
[    0.172000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.172000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.204000] Synchronize counters for CPU 1: done.
[    0.212000] launch: starting cpu2
[    0.216000] launch: cpu2 gone!
[    0.216000] CPU2 revision is: 0001992f (MIPS 1004Kc)
[    0.216000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
[    0.216000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.216000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.248000] Synchronize counters for CPU 2: done.
[    0.256000] launch: starting cpu3
[    0.260000] launch: cpu3 gone!
[    0.260000] CPU3 revision is: 0001992f (MIPS 1004Kc)
[    0.260000] Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
[    0.260000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.260000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.288000] Synchronize counters for CPU 3: done.
[    0.296000] Brought up 4 CPUs
[    0.300000] NET: Registered protocol family 16
[    0.600000] release PCIe RST: RALINK_RSTCTRL = 7000000
[    0.604000] PCIE PHY initialize
[    0.608000] ***** Xtal 40MHz *****
[    0.612000] start MT7621 PCIe register access
[    1.208000] RALINK_RSTCTRL = 7000000
[    1.212000] RALINK_CLKCFG1 = 77ffeff8
[    1.216000]
[    1.216000] *************** MT7621 PCIe RC mode *************
[    1.712000] pcie_link status = 0x7
[    1.716000] RALINK_RSTCTRL= 7000000
[    1.720000] *** Configure Device number setting of Virtual PCI-PCI bridge ***
[    1.724000] RALINK_PCI_PCICFG_ADDR = 21007f2 -> 21007f2
[    1.728000] PCIE0 enabled
[    1.732000] PCIE1 enabled
[    1.736000] PCIE2 enabled
[    1.740000] interrupt enable status: 700000
[    1.744000] Port 2 N_FTS = 1b105000
[    1.748000] Port 1 N_FTS = 1b105000
[    1.752000] Port 0 N_FTS = 1b105000
[    1.756000] config reg done
[    1.760000] init_rt2880pci done
[    1.780000] bio: create slab <bio-0> at 0
[    1.784000] PCI host bridge to bus 0000:00
[    1.788000] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
[    1.792000] pci_bus 0000:00: root bus resource [io  0x1e160000-0x1e16ffff]
[    1.796000] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
[    1.800000] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    1.804000] pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    1.808000] pci 0000:00:02.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    1.812000] pci 0000:00:00.0: BAR 0: can't assign mem (size 0x80000000)
[    1.816000] pci 0000:00:01.0: BAR 0: can't assign mem (size 0x80000000)
[    1.820000] pci 0000:00:02.0: BAR 0: can't assign mem (size 0x80000000)
[    1.824000] pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff]
[    1.828000] pci 0000:00:00.0: BAR 9: assigned [mem 0x60100000-0x601fffff pref]
[    1.832000] pci 0000:00:01.0: BAR 8: assigned [mem 0x60200000-0x602fffff]
[    1.836000] pci 0000:00:01.0: BAR 9: assigned [mem 0x60300000-0x603fffff pref]
[    1.840000] pci 0000:00:02.0: BAR 8: assigned [mem 0x60400000-0x604fffff]
[    1.844000] pci 0000:00:02.0: BAR 9: assigned [mem 0x60500000-0x605fffff pref]
[    1.848000] pci 0000:00:00.0: BAR 1: assigned [mem 0x60600000-0x6060ffff]
[    1.852000] pci 0000:00:01.0: BAR 1: assigned [mem 0x60610000-0x6061ffff]
[    1.856000] pci 0000:00:02.0: BAR 1: assigned [mem 0x60620000-0x6062ffff]
[    1.860000] pci 0000:00:02.0: BAR 7: assigned [io  0x1e160000-0x1e160fff]
[    1.864000] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit]
[    1.868000] pci 0000:01:00.0: BAR 6: assigned [mem 0x60100000-0x6010ffff pref]
[    1.872000] pci 0000:00:00.0: PCI bridge to [bus 01]
[    1.876000] pci 0000:00:00.0:   bridge window [mem 0x60000000-0x600fffff]
[    1.880000] pci 0000:00:00.0:   bridge window [mem 0x60100000-0x601fffff pref]
[    1.884000] pci 0000:02:00.0: BAR 0: assigned [mem 0x60200000-0x602fffff 64bit]
[    1.888000] pci 0000:02:00.0: BAR 6: assigned [mem 0x60300000-0x6030ffff pref]
[    1.892000] pci 0000:00:01.0: PCI bridge to [bus 02]
[    1.896000] pci 0000:00:01.0:   bridge window [mem 0x60200000-0x602fffff]
[    1.900000] pci 0000:00:01.0:   bridge window [mem 0x60300000-0x603fffff pref]
[    1.904000] pci 0000:03:00.0: BAR 6: assigned [mem 0x60500000-0x6050ffff pref]
[    1.908000] pci 0000:03:00.0: BAR 5: assigned [mem 0x60400000-0x604001ff]
[    1.912000] pci 0000:03:00.0: BAR 4: assigned [io  0x1e160000-0x1e16001f]
[    1.916000] pci 0000:03:00.0: BAR 0: assigned [io  0x1e160020-0x1e160027]
[    1.920000] pci 0000:03:00.0: BAR 2: assigned [io  0x1e160028-0x1e16002f]
[    1.924000] pci 0000:03:00.0: BAR 1: assigned [io  0x1e160030-0x1e160033]
[    1.928000] pci 0000:03:00.0: BAR 3: assigned [io  0x1e160034-0x1e160037]
[    1.932000] pci 0000:00:02.0: PCI bridge to [bus 03]
[    1.936000] pci 0000:00:02.0:   bridge window [io  0x1e160000-0x1e160fff]
[    1.940000] pci 0000:00:02.0:   bridge window [mem 0x60400000-0x604fffff]
[    1.944000] pci 0000:00:02.0:   bridge window [mem 0x60500000-0x605fffff pref]
[    1.948000] PCI: Enabling device 0000:00:00.0 (0004 -> 0006)
[    1.952000] PCI: Enabling device 0000:00:01.0 (0004 -> 0006)
[    1.956000] PCI: Enabling device 0000:00:02.0 (0004 -> 0007)
[    1.960000] BAR0 at slot 0 = 0
[    1.964000] bus=0x0, slot = 0x0
[    1.968000] res[0]->start = 0
[    1.972000] res[0]->end = 0
[    1.976000] res[1]->start = 60600000
[    1.980000] res[1]->end = 6060ffff
[    1.984000] res[2]->start = 0
[    1.988000] res[2]->end = 0
[    1.992000] res[3]->start = 0
[    1.996000] res[3]->end = 0
[    2.000000] res[4]->start = 0
[    2.004000] res[4]->end = 0
[    2.008000] res[5]->start = 0
[    2.012000] res[5]->end = 0
[    2.016000] BAR0 at slot 1 = 0
[    2.020000] bus=0x0, slot = 0x1
[    2.024000] res[0]->start = 0
[    2.028000] res[0]->end = 0
[    2.032000] res[1]->start = 60610000
[    2.036000] res[1]->end = 6061ffff
[    2.040000] res[2]->start = 0
[    2.044000] res[2]->end = 0
[    2.048000] res[3]->start = 0
[    2.052000] res[3]->end = 0
[    2.056000] res[4]->start = 0
[    2.060000] res[4]->end = 0
[    2.064000] res[5]->start = 0
[    2.068000] res[5]->end = 0
[    2.072000] BAR0 at slot 2 = 0
[    2.076000] bus=0x0, slot = 0x2
[    2.080000] res[0]->start = 0
[    2.084000] res[0]->end = 0
[    2.088000] res[1]->start = 60620000
[    2.092000] res[1]->end = 6062ffff
[    2.096000] res[2]->start = 0
[    2.100000] res[2]->end = 0
[    2.104000] res[3]->start = 0
[    2.108000] res[3]->end = 0
[    2.112000] res[4]->start = 0
[    2.116000] res[4]->end = 0
[    2.120000] res[5]->start = 0
[    2.124000] res[5]->end = 0
[    2.128000] bus=0x1, slot = 0x0, irq=0x4
[    2.132000] res[0]->start = 60000000
[    2.136000] res[0]->end = 600fffff
[    2.140000] res[1]->start = 0
[    2.144000] res[1]->end = 0
[    2.148000] res[2]->start = 0
[    2.152000] res[2]->end = 0
[    2.156000] res[3]->start = 0
[    2.160000] res[3]->end = 0
[    2.164000] res[4]->start = 0
[    2.168000] res[4]->end = 0
[    2.172000] res[5]->start = 0
[    2.176000] res[5]->end = 0
[    2.180000] bus=0x2, slot = 0x1, irq=0x18
[    2.184000] res[0]->start = 60200000
[    2.188000] res[0]->end = 602fffff
[    2.192000] res[1]->start = 0
[    2.196000] res[1]->end = 0
[    2.200000] res[2]->start = 0
[    2.204000] res[2]->end = 0
[    2.208000] res[3]->start = 0
[    2.212000] res[3]->end = 0
[    2.216000] res[4]->start = 0
[    2.220000] res[4]->end = 0
[    2.224000] res[5]->start = 0
[    2.228000] res[5]->end = 0
[    2.232000] bus=0x3, slot = 0x2, irq=0x19
[    2.236000] res[0]->start = 1e160020
[    2.240000] res[0]->end = 1e160027
[    2.244000] res[1]->start = 1e160030
[    2.248000] res[1]->end = 1e160033
[    2.252000] res[2]->start = 1e160028
[    2.256000] res[2]->end = 1e16002f
[    2.260000] res[3]->start = 1e160034
[    2.264000] res[3]->end = 1e160037
[    2.268000] res[4]->start = 1e160000
[    2.272000] res[4]->end = 1e16001f
[    2.276000] res[5]->start = 60400000
[    2.280000] res[5]->end = 604001ff
[    2.284000] Switching to clocksource MIPS
[    2.288000] NET: Registered protocol family 2
[    2.308000] TCP established hash table entries: 2048 (order: 2, 16384 bytes)
[    2.320000] TCP bind hash table entries: 2048 (order: 2, 16384 bytes)
[    2.332000] TCP: Hash tables configured (established 2048 bind 2048)
[    2.344000] TCP: reno registered
[    2.352000] UDP hash table entries: 256 (order: 1, 8192 bytes)
[    2.364000] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
[    2.376000] NET: Registered protocol family 1
[    2.476000] 4 CPUs re-calibrate udelay(lpj = 1167360)
[    2.488000] Load Ralink Timer0 Module
[    2.496000] Load Ralink Timer2 Module
[    2.504000] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    2.516000] jffs2: version 2.2. (NAND) (SUMMARY)  (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
[    2.536000] msgmni has been set to 498
[    2.544000] io scheduler noop registered (default)
[    2.556000] Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
[    2.568000] serial8250: ttyS0 at MMIO 0x1e000d00 (irq = 27) is a 16550A
[    2.580000] serial8250: ttyS1 at MMIO 0x1e000c00 (irq = 26) is a 16550A
[    2.596000] Ralink gpio driver initialized
[    2.612000] brd: module loaded
[    2.620000] flash manufacture id: c8, device id 40 18
[    2.628000] GD25Q128C(c8 40180000) (16384 Kbytes)
[    2.640000] mtd .name = raspi, .size = 0x01000000 (16M) .erasesize = 0x00010000 (64K) .numeraseregions = 0
[    2.660000] Creating 5 MTD partitions on "raspi":
[    2.668000] 0x000000000000-0x000001000000 : "ALL"
[    2.680000] 0x000000000000-0x000000030000 : "Bootloader"
[    2.692000] 0x000000030000-0x000000040000 : "Config"
[    2.700000] 0x000000040000-0x000000050000 : "Factory"
[    2.712000] 0x000000050000-0x000031050000 : "firmware"
[    2.724000] mtd: partition "firmware" extends beyond the end of device "raspi" -- size truncated to 0xfb0000
[    2.744000] 0x000000190f64-0x000001000000 : "rootfs"
[    2.756000] mtd: partition "rootfs" must either start or end on erase block boundary or be smaller than an erase block -- forcing read-only
[    2.780000] mtd: partition "rootfs_data" created automatically, ofs=0x750000, len=0x8b0000
[    2.796000] 0x000000750000-0x000001000000 : "rootfs_data"
[    2.808000] rdm_major = 253
[    2.816000] GMAC1_MAC_ADRH -- : 0x0000000c
[    2.824000] GMAC1_MAC_ADRL -- : 0x43288093
[    2.832000] Ralink APSoC Ethernet Driver Initilization. v3.1  512 rx/tx descriptors allocated, mtu = 1500!
[    2.852000] GMAC1_MAC_ADRH -- : 0x0000000c
[    2.860000] GMAC1_MAC_ADRL -- : 0x432880d0
[    2.868000] PROC INIT OK!
[    2.872000] i2c /dev entries driver
[    2.880000] rtc-pcf8563 0-0051: chip found, driver version 0.4.3
[    2.892000] rtc-pcf8563 0-0051: low voltage detected, date/time is not reliable.
[    2.908000] rtc-pcf8563 0-0051: retrieved date/time is not valid.
[    2.920000] rtc-pcf8563 0-0051: rtc core: registered rtc-pcf8563 as rtc0
[    2.936000] i2c-mt7621 i2c-mt7621.0: loaded
[    2.944000] TCP: cubic registered
[    2.952000] NET: Registered protocol family 10
[    2.960000] NET: Registered protocol family 17
[    2.968000] 8021q: 802.1Q VLAN Support v1.8
[    3.004000] rtc-pcf8563 0-0051: low voltage detected, date/time is not reliable.
[    3.020000] rtc-pcf8563 0-0051: retrieved date/time is not valid.
[    3.032000] rtc-pcf8563 0-0051: hctosys: invalid date/time
[    3.048000] VFS: Mounted root (squashfs filesystem) readonly on device 31:5.
[    3.064000] Freeing unused kernel memory: 268K (8038d000 - 803d0000)
procd: Console is alive
[    4.652000] usbcore: registered new interface driver usbfs
[    4.664000] usbcore: registered new interface driver hub
[    4.672000] usbcore: registered new device driver usb
[    4.720000] SCSI subsystem initialized
[    4.732000] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[    4.748000] ehci-platform: EHCI generic platform driver
[    4.772000] ahci: SSS flag set, parallel bus scan disabled
[    4.784000] ahci 0000:03:00.0: AHCI 0001.0200 32 slots 2 ports 6 Gbps 0x3 impl SATA mode
[    4.800000] ahci 0000:03:00.0: flags: 64bit ncq sntf stag led clo pmp pio slum part ccc sxs
[    4.820000] scsi0 : ahci
[    4.824000] scsi1 : ahci
[    4.832000] ata1: SATA max UDMA/133 abar m512@0x60400000 port 0x60400100 irq 25
[    4.844000] ata2: SATA max UDMA/133 abar m512@0x60400000 port 0x60400180 irq 25
[    5.180000] ata1: SATA link down (SStatus 0 SControl 300)
[    5.508000] ata2: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
[    5.532000] ata2.00: ATA-8: KINGSTON SHFS37A120G, 603ABBF0, max UDMA/133
[    5.544000] ata2.00: 234441648 sectors, multi 1: LBA48 NCQ (depth 31/32), AA
[    5.564000] ata2.00: configured for UDMA/133
[    5.572000] scsi 1:0:0:0: Direct-Access     ATA      KINGSTON SHFS37A 603A PQ: 0 ANSI: 5
[    5.588000] sd 1:0:0:0: [sda] 234441648 512-byte logical blocks: (120 GB/111 GiB)
[    5.604000] sd 1:0:0:0: [sda] Write Protect is off
[    5.616000] sd 1:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
[    5.636000]  sda: unknown partition table
[    5.648000] sd 1:0:0:0: [sda] Attached SCSI disk
[    5.664000] usbcore: registered new interface driver usb-storage
procd: - preinit -
[    6.284000] Raeth v3.1 (Tasklet)
[    6.300000] phy_free_head is 0xf732000!!!
[    6.308000] phy_free_tail_phy is 0xf733ff0!!!
[    6.316000] txd_pool=af734000 phy_txd_pool=0F734000
[    6.324000] ei_local->skb_free start address is 0x8fe9d4d4.
[    6.336000] free_txd: af734010, ei_local->cpu_ptr: 0F734000
[    6.348000]  POOL  HEAD_PTR | DMA_PTR | CPU_PTR
[    6.356000] ----------------+---------+--------
[    6.368000]      0xaf734000 0x0F734000 0x0F734000
[    6.376000]
[    6.376000] phy_qrx_ring = 0x0f439000, qrx_ring = 0xaf439000
[    6.392000]
[    6.392000] phy_rx_ring0 = 0x0f736000, rx_ring0 = 0xaf736000
[    6.416000] change HW-TRAP to 0x17ccf
[    6.424000] set LAN/WAN LLLLW
[    6.436000] GMAC1_MAC_ADRH -- : 0x0000000c
[    6.444000] GMAC1_MAC_ADRL -- : 0x432880d0
[    6.452000] GDMA2_MAC_ADRH -- : 0x0000000c
[    6.460000] GDMA2_MAC_ADRL -- : 0x432880ba
[    6.468000] eth1: ===> VirtualIF_open
[    6.476000] CDMA_CSG_CFG = 81000000
[    6.484000] GDMA1_FWD_CFG = 20710000
[    6.492000] GDMA2_FWD_CFG = 20710000
Press the [f] key and hit [enter] to enter failsafe mode
Press the [1], [2], [3] or [4] key and hit [enter] to select the debug level
kmod: ran 1 iterations
[    9.992000] jffs2: notice: (327) jffs2_build_xattr_subsystem: complete building xattr subsystem, 1 of xdatum (1 unchecked, 0 orphan) and 9 of xref (0 dead, 0 orphan) found.
block: extroot: no root or overlay mount defined
jffs2 is ready
jffs2 is ready
[   10.080000] jffs2: notice: (324) jffs2_build_xattr_subsystem: complete building xattr subsystem, 1 of xdatum (1 unchecked, 0 orphan) and 9 of xref (0 dead, 0 orphan) found.
switching to overlay
[   10.120000] ra2880stop()...Done
[   10.128000] eth1: ===> VirtualIF_close
[   10.136000] Free TX/RX Ring Memory!
procd: - early -
[   10.476000] EXT4-fs (sda): recovery complete
[   10.488000] EXT4-fs (sda): mounted filesystem with ordered data mode. Opts:
procd: - ubus -
procd: - init -
Please press Enter to activate this console.
[   11.724000] Key type dns_resolver registered
[   11.748000] RPC: Registered named UNIX socket transport module.
[   11.760000] RPC: Registered udp transport module.
[   11.768000] RPC: Registered tcp transport module.
[   11.780000] RPC: Registered tcp NFSv4.1 backchannel transport module.
[   11.804000] NTFS driver 2.1.30 [Flags: R/O MODULE].
[   11.836000] Installing knfsd (copyright (C) 1996 okir@monad.swb.de).
[   11.856000] nf_conntrack version 0.5.0 (3995 buckets, 15980 max)
[   11.876000] ip6_tables: (C) 2000-2006 Netfilter Core Team
[   11.892000] sd 1:0:0:0: Attached scsi generic sg0 type 0
[   11.904000] MTK MSDC device init.
[   11.928000] msdc0 -> ================ <- msdc_set_mclk() : L<685> PID<kmodloader><0x28b>
[   11.944000] msdc0 -> !!! Set<400KHz> Source<50000KHz> -> sclk<390KHz> <- msdc_set_mclk() : L<686> PID<kmodloader><0x28b>
[   11.964000] msdc0 -> ================ <- msdc_set_mclk() : L<687> PID<kmodloader><0x28b>
[   11.996000] msdc0 -> ops_get_cd return<0> <- msdc_ops_get_cd() : L<2316> PID<kworker/u8:0><0x6>
[   11.996000] mtk-sd: MediaTek MT6575 MSDC Driver
[   12.020000] msdc0 -> set mclk to 0!!! <- msdc_set_mclk() : L<633> PID<kworker/u8:0><0x6>
[   12.392000] register rt2860
[   12.408000]
[   12.408000]
[   12.408000] === pAd = c0a01000, size = 2023816 ===
[   12.408000]
[   12.428000] <-- RTMPAllocTxRxRingMemory, Status=0
[   12.436000] <-- RTMPAllocAdapterBlock, Status=0
[   12.444000] pAd->CSRBaseAddress =0xc0900000, csr_addr=0xc0900000!
[   12.456000] device_id =0x7662
[   12.464000] ==>rlt_wlan_chip_onoff(): OnOff:1, Reset= 1, pAd->WlanFunCtrl:0x0, Reg-WlanFunCtrl=0x20a
[   12.484000] E2pAccessMode=2
[   12.492000] cfg_mode=14
[   12.496000] cfg_mode=14
[   12.500000] wmode_band_equal(): Band Not Equal!
[   12.512000] APSDCapable[0]=0
[   12.520000] APSDCapable[1]=0
[   12.524000] APSDCapable[2]=0
[   12.528000] APSDCapable[3]=0
[   12.536000] APSDCapable[4]=0
[   12.540000] APSDCapable[5]=0
[   12.548000] APSDCapable[6]=0
[   12.552000] APSDCapable[7]=0
[   12.560000] APSDCapable[8]=0
[   12.564000] APSDCapable[9]=0
[   12.568000] APSDCapable[10]=0
[   12.576000] APSDCapable[11]=0
[   12.580000] APSDCapable[12]=0
[   12.588000] APSDCapable[13]=0
[   12.592000] APSDCapable[14]=0
[   12.600000] APSDCapable[15]=0
[   12.604000] default ApCliAPSDCapable[0]=0
[   12.744000] Key1Str is Invalid key length(0) or Type(0)
[   12.756000] Key2Str is Invalid key length(0) or Type(0)
[   12.768000] Key3Str is Invalid key length(0) or Type(0)
[   12.776000] Key4Str is Invalid key length(0) or Type(0)
[   12.812000] RtmpChipOpsEepromHook::e2p_type=2, inf_Type=5
[   12.824000] NVM is FLASH mode (pAd->flash_offset = 0x48000)
[   12.836000] get_dev_name_prefix(): dev_idx = 1, dev_name_prefix=rai
[   12.860000]
[   12.860000]
[   12.860000] === pAd = c0d01000, size = 2023816 ===
[   12.860000]
[   12.880000] <-- RTMPAllocTxRxRingMemory, Status=0
[   12.892000] <-- RTMPAllocAdapterBlock, Status=0
[   12.900000] pAd->CSRBaseAddress =0xc0c00000, csr_addr=0xc0c00000!
[   12.912000] device_id =0x7662
[   12.920000] ==>rlt_wlan_chip_onoff(): OnOff:1, Reset= 1, pAd->WlanFunCtrl:0x0, Reg-WlanFunCtrl=0x20a
[   12.940000] E2pAccessMode=2
[   12.948000] cfg_mode=9
[   12.952000] cfg_mode=9
[   12.956000] wmode_band_equal(): Band Not Equal!
[   12.968000] APSDCapable[0]=0
[   12.972000] APSDCapable[1]=0
[   12.980000] APSDCapable[2]=0
[   12.984000] APSDCapable[3]=0
[   12.992000] APSDCapable[4]=0
[   12.996000] APSDCapable[5]=0
[   13.004000] APSDCapable[6]=0
[   13.008000] APSDCapable[7]=0
[   13.012000] APSDCapable[8]=0
[   13.020000] APSDCapable[9]=0
[   13.024000] APSDCapable[10]=0
[   13.032000] APSDCapable[11]=0
[   13.036000] APSDCapable[12]=0
[   13.044000] APSDCapable[13]=0
[   13.048000] APSDCapable[14]=0
[   13.056000] APSDCapable[15]=0
[   13.060000] default ApCliAPSDCapable[0]=0
[   13.200000] Key1Str is Invalid key length(0) or Type(0)
[   13.212000] Key2Str is Invalid key length(0) or Type(0)
[   13.224000] Key3Str is Invalid key length(0) or Type(0)
[   13.232000] Key4Str is Invalid key length(0) or Type(0)
[   13.268000] RtmpChipOpsEepromHook::e2p_type=2, inf_Type=5
[   13.280000] NVM is FLASH mode (pAd->flash_offset = 0x40000)
[   13.292000] get_dev_name_prefix(): dev_idx = 0, dev_name_prefix=ra
[   13.376000] ip_tables: (C) 2000-2006 Netfilter Core Team
[   13.388000] Type=Linux
[   13.448000] Load Kernel WDG Timer Module
[   13.456000] Ralink APSoC Hardware Watchdog Timer
[   13.480000] xt_time: kernel timezone is -0000
[   13.496000] PPP generic driver version 2.4.2
[   13.504000] NET: Registered protocol family 24
[   17.636000] build time =
[   17.644000] 20141115060606a
[   17.648000] rom patch for E3 IC
[   17.656000]
[   17.660000] platform =
[   17.664000] ALPS
[   17.668000] hw/sw version =
[   17.672000]
[   17.676000] patch version =
[   17.684000]
[   17.700000] FW Version:0.0.00 Build:1
[   17.708000] Build Time:201410061140____
[   17.716000] fw for E3 IC
[   17.740000] RX[0] DESC ae62c000 size = 4096
[   17.756000] RX[1] DESC ae62d000 size = 4096
[   17.796000] E2pAccessMode=2
[   17.804000] cfg_mode=9
[   17.808000] cfg_mode=9
[   17.812000] wmode_band_equal(): Band Equal!
[   17.824000] APSDCapable[0]=0
[   17.832000] APSDCapable[1]=0
[   17.836000] APSDCapable[2]=0
[   17.844000] APSDCapable[3]=0
[   17.848000] APSDCapable[4]=0
[   17.856000] APSDCapable[5]=0
[   17.860000] APSDCapable[6]=0
[   17.864000] APSDCapable[7]=0
[   17.872000] APSDCapable[8]=0
[   17.876000] APSDCapable[9]=0
[   17.884000] APSDCapable[10]=0
[   17.888000] APSDCapable[11]=0
[   17.896000] APSDCapable[12]=0
[   17.900000] APSDCapable[13]=0
[   17.908000] APSDCapable[14]=0
[   17.912000] APSDCapable[15]=0
[   17.920000] default ApCliAPSDCapable[0]=0
[   18.116000] Key1Str is Invalid key length(0) or Type(0)
[   18.128000] Key2Str is Invalid key length(0) or Type(0)
[   18.140000] Key3Str is Invalid key length(0) or Type(0)
[   18.152000] Key4Str is Invalid key length(0) or Type(0)
[   18.200000] 1. Phy Mode = 14
[   18.208000] get_chl_grp:illegal channel (167)
[   18.216000] get_chl_grp:illegal channel (167)
[   18.224000] get_chl_grp:illegal channel (169)
[   18.232000] get_chl_grp:illegal channel (169)
[   18.240000] get_chl_grp:illegal channel (171)
[   18.248000] get_chl_grp:illegal channel (171)
[   18.260000] get_chl_grp:illegal channel (173)
[   18.268000] get_chl_grp:illegal channel (173)
[   18.276000] Country Region from e2p = 3f3f
[   18.284000] mt76x2_read_temp_info_from_eeprom:: is_temp_tx_alc=0, temp_tx_alc_enable=0
[   18.300000] mt76x2_read_tx_alc_info_from_eeprom:: is_ePA_mode=0, ePA_type=3
[   18.316000] mt76x2_read_tx_alc_info_from_eeprom:: [5G band] high_temp_slope=0, low_temp_slope=0
[   18.332000] mt76x2_read_tx_alc_info_from_eeprom:: [2G band] high_temp_slope=0, low_temp_slope=0
[   18.348000] mt76x2_read_tx_alc_info_from_eeprom:: [5G band] tc_lower_bound=0, tc_upper_bound=0
[   18.368000] mt76x2_read_tx_alc_info_from_eeprom:: [2G band] tc_lower_bound=0, tc_upper_bound=0
[   18.384000] mt76x2_get_external_lna_gain::LNA type=0x11, BLNAGain=0x0, ALNAGain0=0x0, ALNAGain1=0x0, ALNAGain2=0x0
[   18.404000] 2. Phy Mode = 14
[   18.412000] 3. Phy Mode = 14
[   18.416000] andes_pci_fw_init
[   18.420000] 0x1300 = 00073200
[   18.452000] AntCfgInit: primary/secondary ant 0/1
[   18.464000] andes_load_cr:cr_type(2)
[   18.480000] ChipStructAssign(): MT76x2 hook !
[   18.488000] MCS Set = ff ff 00 00 01
[   18.644000] mt76x2_bbp_adjust():rf_bw=1, ext_ch=1, PrimCh=5, HT-CentCh=7, VHT-CentCh=0
[   18.700000] r-cal result = 63
[   18.780000] TX0 power compensation = 0x38
[   18.788000] TX1 power compensation = 0x38
[   18.796000] APStartUp(): AP Set CentralFreq at 7(Prim=5, HT-CentCh=7, VHT-CentCh=0, BBP_BW=1)
[   18.828000] mt76x2_calibration(channel = 7)
[   19.144000] Main bssid = 00:00:00:00:00:f8
[   19.152000] mt76x2_reinit_agc_gain:original agc_vga0 = 0x5c, agc_vga1 = 0x5c
[   19.168000] mt76x2_reinit_agc_gain:updated agc_vga0 = 0x5c, agc_vga1 = 0x5c
[   19.180000] mt76x2_reinit_hi_lna_gain:original hi_lna0 = 0x27, hi_lna1 = 0x27
[   19.196000] mt76x2_reinit_hi_lna_gain:updated hi_lna0 = 0x27, hi_lna1 = 0x27
[   19.212000] original vga value(chain0) = 5c
[   19.220000] original vga value(chain1) = 5c
[   19.228000] <==== rt28xx_init, Status=0
[   19.236000] get_dev_name_prefix(): dev_idx = 0, dev_name_prefix=apcli
[   19.248000] RTMPDrvOpen(1):Check if PDMA is idle!
[   19.260000] RTMPDrvOpen(2):Check if PDMA is idle!
[   19.288000] Raeth v3.1 (Tasklet)
[   19.300000] phy_free_head is 0xe3d2000!!!
[   19.308000] phy_free_tail_phy is 0xe3d3ff0!!!
[   19.320000] txd_pool=ae2aa000 phy_txd_pool=0E2AA000
[   19.328000] ei_local->skb_free start address is 0x8fe9d4d4.
[   19.340000] free_txd: ae2aa010, ei_local->cpu_ptr: 0E2AA000
[   19.352000]  POOL  HEAD_PTR | DMA_PTR | CPU_PTR
[   19.360000] ----------------+---------+--------
[   19.368000]      0xae2aa000 0x0E2AA000 0x0E2AA000
[   19.380000]
[   19.380000] phy_qrx_ring = 0x0e333000, qrx_ring = 0xae333000
[   19.392000]
[   19.392000] phy_rx_ring0 = 0x0e048000, rx_ring0 = 0xae048000
[   19.420000] change HW-TRAP to 0x17ccf
[   19.428000] set LAN/WAN LLLLW
[   19.436000] GMAC1_MAC_ADRH -- : 0x0000000c
[   19.444000] GMAC1_MAC_ADRL -- : 0x432880d0
[   19.456000] eth1: ===> VirtualIF_open
[   19.460000] CDMA_CSG_CFG = 81000000
[   19.468000] GDMA1_FWD_CFG = 20710000
[   19.476000] GDMA2_FWD_CFG = 20710000
[   19.488000] device eth0.1 entered promiscuous mode
[   19.496000] device eth0 entered promiscuous mode
[   19.508000] br-lan: port 1(eth0.1) entered forwarding state
[   19.516000] br-lan: port 1(eth0.1) entered forwarding state
[   19.540000] eth1: ===> VirtualIF_open
[   19.548000] device eth1 entered promiscuous mode
[   19.556000] br-lan: port 2(eth1) entered forwarding state
[   19.568000] br-lan: port 2(eth1) entered forwarding state
[   20.168000] device ra0 entered promiscuous mode
[   20.176000] br-lan: port 3(ra0) entered forwarding state
[   20.188000] br-lan: port 3(ra0) entered forwarding state
[   20.456000] build time =
[   20.460000] 20141115060606a
[   20.468000] rom patch for E3 IC
[   20.472000]
[   20.476000] platform =
[   20.480000] ALPS
[   20.484000] hw/sw version =
[   20.492000]
[   20.492000] patch version =
[   20.500000]
[   20.516000] FW Version:0.0.00 Build:1
[   20.524000] Build Time:201410061140____
[   20.532000] fw for E3 IC
[   20.552000] RX[0] DESC aed4e000 size = 4096
[   20.564000] RX[1] DESC aed4f000 size = 4096
[   20.588000] E2pAccessMode=2
[   20.592000] cfg_mode=14
[   20.600000] cfg_mode=14
[   20.604000] wmode_band_equal(): Band Not Equal!
[   20.616000] APSDCapable[0]=0
[   20.620000] APSDCapable[1]=0
[   20.628000] APSDCapable[2]=0
[   20.632000] APSDCapable[3]=0
[   20.640000] APSDCapable[4]=0
[   20.644000] APSDCapable[5]=0
[   20.648000] APSDCapable[6]=0
[   20.656000] APSDCapable[7]=0
[   20.660000] APSDCapable[8]=0
[   20.668000] APSDCapable[9]=0
[   20.672000] APSDCapable[10]=0
[   20.680000] APSDCapable[11]=0
[   20.684000] APSDCapable[12]=0
[   20.692000] APSDCapable[13]=0
[   20.696000] APSDCapable[14]=0
[   20.700000] APSDCapable[15]=0
[   20.708000] default ApCliAPSDCapable[0]=0
[   20.868000] Key1Str is Invalid key length(0) or Type(0)
[   20.880000] Key2Str is Invalid key length(0) or Type(0)
[   20.888000] Key3Str is Invalid key length(0) or Type(0)
[   20.900000] Key4Str is Invalid key length(0) or Type(0)
[   20.936000] 1. Phy Mode = 49
[   20.940000] get_chl_grp:illegal channel (167)
[   20.948000] get_chl_grp:illegal channel (167)
[   20.956000] get_chl_grp:illegal channel (169)
[   20.968000] get_chl_grp:illegal channel (169)
[   20.976000] get_chl_grp:illegal channel (171)
[   20.984000] get_chl_grp:illegal channel (171)
[   20.992000] get_chl_grp:illegal channel (173)
[   21.000000] get_chl_grp:illegal channel (173)
[   21.008000] Country Region from e2p = 3f3f
[   21.016000] mt76x2_read_temp_info_from_eeprom:: is_temp_tx_alc=0, temp_tx_alc_enable=0
[   21.032000] mt76x2_read_tx_alc_info_from_eeprom:: is_ePA_mode=0, ePA_type=3
[   21.048000] mt76x2_read_tx_alc_info_from_eeprom:: [5G band] high_temp_slope=0, low_temp_slope=0
[   21.064000] mt76x2_read_tx_alc_info_from_eeprom:: [2G band] high_temp_slope=0, low_temp_slope=0
[   21.084000] mt76x2_read_tx_alc_info_from_eeprom:: [5G band] tc_lower_bound=0, tc_upper_bound=0
[   21.100000] mt76x2_read_tx_alc_info_from_eeprom:: [2G band] tc_lower_bound=0, tc_upper_bound=0
[   21.116000] mt76x2_get_external_lna_gain::LNA type=0x11, BLNAGain=0x0, ALNAGain0=0x0, ALNAGain1=0x0, ALNAGain2=0x0
[   21.136000] 2. Phy Mode = 49
[   21.144000] 3. Phy Mode = 49
[   21.148000] andes_pci_fw_init
[   21.156000] 0x1300 = 00073200
[   21.184000] AntCfgInit: primary/secondary ant 0/1
[   21.196000] andes_load_cr:cr_type(2)
[   21.212000] ChipStructAssign(): MT76x2 hook !
[   21.220000] MCS Set = ff ff 00 00 01
[   21.360000] mt76x2_bbp_adjust():rf_bw=2, ext_ch=3, PrimCh=112, HT-CentCh=110, VHT-CentCh=106
[   21.412000] r-cal result = 63
[   21.492000] TX0 power compensation = 0x38
[   21.500000] TX1 power compensation = 0x38
[   21.508000] APStartUp(): AP Set CentralFreq at 106(Prim=112, HT-CentCh=110, VHT-CentCh=106, BBP_BW=2)
[   21.520000] br-lan: port 1(eth0.1) entered forwarding state
[   21.548000] mt76x2_calibration(channel = 106)
[   21.572000] br-lan: port 2(eth1) entered forwarding state
[   21.948000] Main bssid = 00:00:00:00:00:a8
[   21.956000] mt76x2_reinit_agc_gain:original agc_vga0 = 0x5c, agc_vga1 = 0x5c
[   21.968000] mt76x2_reinit_agc_gain:updated agc_vga0 = 0x5c, agc_vga1 = 0x5c
[   21.984000] mt76x2_reinit_hi_lna_gain:original hi_lna0 = 0x27, hi_lna1 = 0x27
[   21.996000] mt76x2_reinit_hi_lna_gain:updated hi_lna0 = 0x27, hi_lna1 = 0x27
[   22.012000] original vga value(chain0) = 5c
[   22.020000] original vga value(chain1) = 5c
[   22.028000] <==== rt28xx_init, Status=0
[   22.036000] get_dev_name_prefix(): dev_idx = 1, dev_name_prefix=apclii
[   22.052000] RTMPDrvOpen(1):Check if PDMA is idle!
[   22.060000] RTMPDrvOpen(2):Check if PDMA is idle!
[   22.192000] br-lan: port 3(ra0) entered forwarding state
[   22.572000] device rai0 entered promiscuous mode
[   22.580000] br-lan: port 4(rai0) entered forwarding state
[   22.592000] br-lan: port 4(rai0) entered forwarding state
[   22.792000] svc: failed to register lockdv1 RPC service (errno 124).
procd: - init complete -
[   24.596000] br-lan: port 4(rai0) entered forwarding state
 
 
 
BusyBox v1.22.1 (2015-11-13 13:40:17 EET) built-in shell (ash)
Enter 'help' for a list of built-in commands.
 
  _______                     ________        __
 |       |.-----.-----.-----.|  |  |  |.----.|  |_
 |   -   ||  _  |  -__|     ||  |  |  ||   _||   _|
 |_______||   __|_____|__|__||________||__|  |____|
          |__| W I R E L E S S   F R E E D O M
 -----------------------------------------------------
 BARRIER BREAKER (Barrier Breaker, unknown)
 -----------------------------------------------------
  * 1/2 oz Galliano         Pour all ingredients into
  * 4 oz cold Coffee        an irish coffee mug filled
  * 1 1/2 oz Dark Rum       with crushed ice. Stir.
  * 2 tsp. Creme de Cacao
 -----------------------------------------------------
root@Witi:/# cat /pro
root@Witi:/# cat /proc/mtd
root@Witi:/# cat /proc/mtd
dev:    size   erasesize  name
mtd0: 01000000 00010000 "ALL"
mtd1: 00030000 00010000 "Bootloader"
mtd2: 00010000 00010000 "Config"
mtd3: 00010000 00010000 "Factory"
mtd4: 00fb0000 00010000 "firmware"
mtd5: 00e6f09c 00010000 "rootfs"
mtd6: 008b0000 00010000 "rootfs_data"
root@Witi:/# [ 5082.684000] ESW: Link Status Changed - Port0 Link UP
[ 5110.936000] nf_conntrack: automatic helper assignment is deprecated and it will be removed soon. Use the iptables CT target to attach helpers instead.

Thanks smile

(Last edited by alphasparc on 18 Nov 2015, 02:44)

5) Here's one of nitroshifts successful boot logs: http://pastebin.com/M0YuKCF3 with one of the forks of openwrt for a different device that happened to boot.

4 cores, 880MHz, 256M of ram.

flash change is in review (got initial thumbs up).

separate .dts file and device profile is up next (will start looking at it, feel free to start working on it if this is up your alley, just let me know on irc to dedup efforts if you're feeling very confident your can get this change into trunk within the next day or two)

@risk

I have the device tree and profile files ready for WiTi, need to push them upstream.

nitroshift

Patches for (almost) full support have been submitted upstream. It won't take long to be accepted and WiTi to have its own profile in mainline OpenWRT.

nitroshift

Sorry, posts 76 to 75 are missing from our archive.