Hi all,
    please help me to solve this strange issue,

  ......
  CC  [M]   ath_aponly.o
  ......

  CC  [M]  if_bus.o
  LD  [M]  ath_dev.o

if_bus.o:(___ksymtab+bus_dma_sync_single+0x0): multiple definition of `__ksymtab_bus_dma_sync_single'
ath_aponly.o:(___ksymtab+bus_dma_sync_single+0x0): first defined here

if_bus.o:(___ksymtab+bus_unmap_single+0x0): multiple definition of `__ksymtab_bus_unmap_single'
ath_aponly.o:(___ksymtab+bus_unmap_single+0x0): first defined here

if_bus.o:(___ksymtab+bus_map_single+0x0): multiple definition of `__ksymtab_bus_map_single'

ath_aponly.o:(___ksymtab+bus_map_single+0x0): first defined here