The content of this topic has been archived between 30 Mar 2018 and 5 May 2018. There are no obvious gaps in this topic, but there may still be some posts missing at the end.
It is possible to boot the original TP-Link .bin via tftpboot from memory when you cut of the first 0x2200 (header + boot loader) bits from the original image. Then there is a second header.
bjoern@debian-bgp:/srv/tftp$ hexdump -C -n 100 ArcherC20i-cut.bin
00000000 03 00 00 00 76 65 72 2e 20 32 2e 30 00 ff ff ff |....ver. 2.0....|
00000010 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
So far I am not able to generate a working header for an openwrt image.
Ok found out some more tidbits. looking at the bootloader source code it has some hidden goodies in it.
if you press 7 you can flash a new bootloader via serial. if you press t then you can enter a development area of the bootloader.
looking at the LZMA error more it looks like the bootloader is looking for the image in a certain section of memory
out of cmd_bootm.c
pkernelLen = addr + 0x78;
pentryPoint = addr + 0x6c;
fake_image_header(hdr, 0x80002000, *pentryPoint, *pkernelLen);
so it is looking for the image at 0x80002000 and at certain offsets to get info
the MediaTek bootloader does a self discovery of this info. looks like they commented out the entire section and hard coded it.
Finally I got the new C2, so I'm going to join the fun again soon.
Any updates?
The only update I can add
Is the tplink GPL uses a modified lzma compressor to create an image. the problem is they didn't include the source code to it. I think they played with the header.
if anyone wants it I can post it somewhere
bd03E, how did you get so far? how did you workaround the LZMA Uncompression?
Finally I got the new C2, so I'm going to join the fun again soon.
Any updates?
I think the C20i is a cost reduced version of the c2 with less flash and less ram. :-(
The hardware of the C20i and C2 is very similar. Both should have 64MB ram and 8MB flash. One difference is the design. The C2 has 2 external removable antennas. The other thing is the switch. The C2 has a 4 port gigabit switch (Realtek) while the C20i uses the SoC build-in 4x 100Mbit switch.
Today I have seen an running CC on an ArcherC20i. So the basic support should be available at the Trunk in a short time.
Unfortunately there is no support for the MediaTek MT7610E. Currently, only the 2,4 GHz band can be used.
Unfortunately there is no support for the MediaTek MT7610E. Currently, only the 2,4 GHz band can be used.
What is needed to get 5GHz support?
Here are the specs I got from tp-link for the C20i:
chipset: MT7620A_H (580MHz) (switch, MAC/BB, PHY) + MT7610E (RFTransceiver)
PA: SKY85703-11
RFLNA: SKY85703-11
RAM: Winbond (DDR2 512Mbit*1)
Chipset: MediaTeK MT7610E
Support Linux, Android by request
The C20i image starts on C2 and C20i (from flash, currently initramfs does not work).
But I get the Realtek rtl8367rb on the C2 not to run. Does anyone have some hints?
(Last edited by bd03E on 11 Jan 2015, 19:23)
Any update about this router?
Chipset: MediaTeK MT7610E
Support Linux, Android by request
Maybe it is not open source.
As I understand it from what I read in this thread.
1) The router has a known/proven chipset
2) The GBit switch on C2 is not working
3) There is an Archer C20i image in Trunk that "works" for both routers
http://downloads.openwrt.org/snapshots/ … ps/mt7620/
I think both these routers would serve the OpenWRT-community well if they worked.
I am thinking about making a wiki-article, but I need to know:
1) Status: "possible" or "work in progress"?
2) Does network work (except the GBit switch)?
3) Does wireless work?
4) Flashing: can an experienced OpenWRT-user restore OEM using standard methods?
...perhaps the answers are not here, because it is better that people who dont know exactly what they are doing (like me) just dont try OpenWRT on C2/C20i at this time...
...perhaps the developers just prefer someone else to do the documentation...
As I understand it from what I read in this thread.
1) The router has a known/proven chipset
2) The GBit switch on C2 is not working
3) There is an Archer C20i image in Trunk that "works" for both routers
http://downloads.openwrt.org/snapshots/ … ps/mt7620/
Is the switch working at 100GBit?
It is kind of useless for me without a wired connection.
And does 5GHz wireless work?
There are too many things that I need that may not work.
I have hope that eventually it will all work.
It is too bad tplink doesn't provide more help.
(Last edited by bjlockie on 21 Feb 2015, 19:26)
Ok I'm back I got a new C2, Can someone list the steps to get an image onto this unit with the bootloader.
tftpboot, then ?
Thanks
tftpserver: 192.168.1.100
MT7620 # tftpboot 0x82000000 image.bin
MT7620 # erase tplink 0x20000 0x7a0000
MT7620 # cp.b 0x82000000 0x20000 0x7a0000
MT7620 # bootm
Do not use the erase linux command!
(Last edited by bd03E on 9 Feb 2015, 18:36)
Interested !!
just a message to follow this discussion.
Hello. I have TP-Link RE200.
The hardware of the RE200 looks like C20i and C2.
RE200v1
SoC: Mediatek MT7620A
RAM: 64MB Winbound W9751G6K8-25
Flash: 8MB cFeon Q64-104HIP
WiFi: 5GHz 801.11ac Mediatek MT7610EN
Seriall port settings:
57600 8n1
Bootlog:
U-Boot 1.1.3 (Aug 19 2014 - 17:43:44)
Board: Ralink APSoC DRAM: 64 MB
relocate_code Pointer at: 83fb4000
enable ephy clock...done. rf reg 29 = 5
SSC disabled.
******************************
Software System Reset Occurred
******************************
spi_wait_nsec: 29
spi device id: 1c 30 17 1c 30 (30171c30)
find flash: EN25Q64
============================================
Ralink UBoot Version: 4.1.0.0
This UBoot has been rewritten by TPLINK *_*
--------------------------------------------
ASIC 7620_MP (Port5<->None)
DRAM component: 512 Mbits DDR, width 16
DRAM bus: 16 bit
Total memory: 64 MBytes
Flash component: SPI Flash
Date:Aug 19 2014 Time:17:43:44
============================================
icache: sets:512, ways:4, linesz:32 ,total:65536
dcache: sets:256, ways:4, linesz:32 ,total:32768
##### The CPU freq = 580 MHZ ####
estimate memory size =64 Mbytes
Please choose the operation:
1: Load system code to SDRAM via TFTP.
2: Load system code then write to Flash via TFTP.
3: Boot system code via Flash (default).
4: Entr boot command line interface.
6: Load ART data then write to Flash via TFTP.
7: Load Boot Loader code then write to Flash via Serial.
9: Load Boot Loader code then write to Flash via TFTP. 0
3: System Boot system code via Flash.
## Booting image at bc020000 ...
Uncompressing Kernel Image ... OK
No initrd
## Transferring control to Linux (at address 8000c310) ...
## Giving linux memsize in MB, 64
Starting kernel ...
LINUX started...
THIS IS ASIC
Linux version 2.6.36+ (tplink@localhost.localdomain) (gcc version 3.4.2) #109 Tue Aug 19 17:51:46 CST 2014
The CPU feqenuce set to 580 MHz
MIPS CPU sleep mode enabled.
PCIE: bypass PCIe DLL.
PCIE: Elastic buffer control: Addr:0x68 -> 0xB4
disable all power about PCIe
CPU revision is: 00019650 (MIPS 24Kc)
Determined physical RAM map:
memory: 04000000 @ 00000000 (usable)
Zone PFN ranges:
Normal 0x00000000 -> 0x00004000
Movable zone start PFN for each node
early_node_map[1] active PFN ranges
0: 0x00000000 -> 0x00004000
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 16256
Kernel command line: console=ttyS1,57600n8 root=/dev/mtdblock3 rw rootfstype=squashfs init=/sbin/init console=ttyS0
PID hash table entries: 256 (order: -2, 1024 bytes)
Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)
Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)
Primary instruction cache 64kB, VIPT, 4-way, linesize 32 bytes.
Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
Writing ErrCtl register=00079760
Readback ErrCtl register=00079760
Memory: 62164k/65536k available (2011k kernel code, 3372k reserved, 453k data, 144k init, 0k highmem)
NR_IRQS:128
MTK/Ralink System Tick Counter init... cd:80259da8, m:214748, s:32
console [ttyS1] enabled
Calibrating delay loop... 386.04 BogoMIPS (lpj=772096)
pid_max: default: 4096 minimum: 301
Mount-cache hash table entries: 512
NET: Registered protocol family 16
RALINK_GPIOMODE = 1a331d
RALINK_GPIOMODE = 18331d
PPLL_CFG1=0xe78000
MT7620 PPLL lock
PPLL_DRV =0x80080504
start PCIe register access
RALINK_PCI_PCICFG_ADDR = 1000f0
*************** MT7620 PCIe RC mode *************
bio: create slab <bio-0> at 0
pci 0000:00:00.0: BAR 8: assigned [mem 0x20000000-0x201fffff]
pci 0000:00:00.0: BAR 1: assigned [mem 0x20200000-0x2020ffff]
pci 0000:00:00.0: BAR 1: set to [mem 0x20200000-0x2020ffff] (PCI address [0x20200000-0x2020ffff]
pci 0000:01:00.0: BAR 0: assigned [mem 0x20000000-0x200fffff]
pci 0000:01:00.0: BAR 0: set to [mem 0x20000000-0x200fffff] (PCI address [0x20000000-0x200fffff]
pci 0000:01:00.1: BAR 0: assigned [mem 0x20100000-0x201fffff]
pci 0000:01:00.1: BAR 0: set to [mem 0x20100000-0x201fffff] (PCI address [0x20100000-0x201fffff]
pci 0000:00:00.0: PCI bridge to [bus 01-01]
pci 0000:00:00.0: bridge window [io disabled]
pci 0000:00:00.0: bridge window [mem 0x20000000-0x201fffff]
pci 0000:00:00.0: bridge window [mem pref disabled]
BAR0 at slot 0 = 0
bus=0x0, slot = 0x0
res[0]->start = 0
res[0]->end = 0
res[1]->start = 20200000
res[1]->end = 2020ffff
res[2]->start = 0
res[2]->end = 0
res[3]->start = 0
res[3]->end = 0
res[4]->start = 0
res[4]->end = 0
res[5]->start = 0
res[5]->end = 0
bus=0x1, slot = 0x0
res[0]->start = 20000000
res[0]->end = 200fffff
res[1]->start = 0
res[1]->end = 0
res[2]->start = 0
res[2]->end = 0
res[3]->start = 0
res[3]->end = 0
res[4]->start = 0
res[4]->end = 0
res[5]->start = 0
res[5]->end = 0
bus=0x1, slot = 0x0
res[0]->start = 20100000
res[0]->end = 201fffff
res[1]->start = 0
res[1]->end = 0
res[2]->start = 0
res[2]->end = 0
res[3]->start = 0
res[3]->end = 0
res[4]->start = 0
res[4]->end = 0
res[5]->start = 0
res[5]->end = 0
Switching to clocksource Ralink external timer
NET: Registered protocol family 2
IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
TCP established hash table entries: 2048 (order: 2, 16384 bytes)
TCP bind hash table entries: 2048 (order: 1, 8192 bytes)
TCP: Hash tables configured (established 2048 bind 2048)
TCP reno registered
NET: Registered protocol family 1
squashfs: version 4.0 (2009/01/31) Phillip Lougher
msgmni has been set to 121
Block layer SCSI generic (bsg) driver version 0.4 loaded (major 254)
io scheduler noop registered (default)
Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
serial8250: ttyS0 at MMIO 0x10000500 (irq = 37) is a 16550A
serial8250: ttyS1 at MMIO 0x10000c00 (irq = 12) is a 16550A
Generic platform RAM MTD, (c) 2004 Simtec Electronics
deice id : 1c 30 17 1c 30 (30171c30)
EN25Q64(1c 30171c30) (8192 Kbytes)
mtd .name = raspi, .size = 0x00800000 (0M) .erasesize = 0x00000008 (0K) .numeraseregions = 65536
Creating 6 MTD partitions on "raspi":
0x000000000000-0x000000800000 : "ALL"
NO GPIO Event!
0x000000000000-0x000000020000 : "Bootloader"
0x000000020000-0x000000120000 : "Kernel"
0x000000120000-0x0000007e0000 : "Rootfs"
0x0000007e0000-0x0000007f0000 : "UserConfig"
0x0000007f0000-0x000000800000 : "ART_Data"
SMACCR1 -- : 0x0000c46e
SMACCR0 -- : 0x1fa04de0
Ralink APSoC Ethernet Driver Initilization. v3.0 256 rx/tx descriptors allocated, mtu = 1500!
SMACCR1 -- : 0x0000c46e
SMACCR0 -- : 0x1fa04de0
PROC INIT OK!
PPP generic driver version 2.4.2
TCP cubic registered
NET: Registered protocol family 17
802.1Q VLAN Support v1.8 Ben Greear <greearb@candelatech.com>
All bugs added by David S. Miller <davem@redhat.com>
VFS: Mounted root (squashfs filesystem) readonly on device 31:3.
Freeing unused kernel memory: 144k freed
init started: BusyBox v1.01 (2014.08.19-09:54+0000) multi-call binary
Algorithmics/MIPS FPU Emulator v1.5
Raeth v3.0 (Tasklet,SkbRecycle)
phy_tx_ring = 0x03ee4000, tx_ring = 0xa3ee4000
phy_rx_ring0 = 0x03ee5000, rx_ring0 = 0xa3ee5000
SMACCR1 -- : 0x0000c46e
SMACCR0 -- : 0x1fa04de0
CDMA_CSG_CFG = 81000000
GDMA1_FWD_CFG = 20010000
This Board use 2.6.36.x
xt_time: kernel timezone is -0000
ip_tables: (C) 2000-2006 Netfilter Core Team, Type=Restricted Cone
nf_conntrack version 0.5.0 (973 buckets, 5120 max)
Netfilter messages via NETLINK v0.30.
ctnetlink v0.93: registering with nfnetlink.
Erase from 0X7E0000 to 0X7EDCDC:.
Program from 0X7E0000 to 0X7EDCDC:
(none) mips #109 Tue Aug 19 17:51:46 CST 2014 (none)
(none) login:
write successfully
device eth2.1 entered promiscuous mode
device eth2 entered promiscuous mode
br0: port 1(eth2.1) entering forwarding state
br0: port 1(eth2.1) entering forwarding state
rt2860v2_ap: module license 'unspecified' taints kernel.
Disabling lock debugging due to kernel taint
MT7620-->
=== pAd = c09ac000, size = 907392 ===
<-- RTMPAllocTxRxRingMemory, Status=0
<-- RTMPAllocAdapterBlock, Status=0
MT7620-->AP Driver version-2.7.1.6_edcca_monitor_20131227
MT7610-->register rtpci
MT7610-->
=== pAd = c1002000, size = 934536 ===
<-- RTMPAllocTxRxRingMemory, Status=0
<-- RTMPAllocAdapterBlock, Status=0
MT7610-->pAd->CSRBaseAddress =0xc0f00000, csr_addr=0xc0f00000!
MT7610-->device_id =0x7650
MT7610-->==>MT76x0_WLAN_ChipOnOff(): OnOff:1, pAd->WlanFunCtrl:0x0, Reg-WlanFunCtrl=0xff000002
MT7610-->MACVersion = 0x76502000
MT7620-->RX DESC a309c000 size = 2048
MT7620-->RTMP_TimerListAdd: add timer obj c0a4c628!
MT7620-->RTMP_TimerListAdd: add timer obj c0a0e038!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10878!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10938!
MT7620-->RTMP_TimerListAdd: add timer obj c0a109f8!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10ab8!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10b78!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10c38!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10cf8!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10db8!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10e78!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10f38!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10ff8!
MT7620-->RTMP_TimerListAdd: add timer obj c0a110b8!
MT7620-->RTMP_TimerListAdd: add timer obj c0a11178!
MT7620-->RTMP_TimerListAdd: add timer obj c0a11238!
MT7620-->RTMP_TimerListAdd: add timer obj c0a112f8!
MT7620-->RTMP_TimerListAdd: add timer obj c0a113b8!
MT7620-->RTMP_TimerListAdd: add timer obj c0a0e00c!
MT7620-->RTMP_TimerListAdd: add timer obj c0a1084c!
MT7620-->RTMP_TimerListAdd: add timer obj c0a1090c!
MT7620-->RTMP_TimerListAdd: add timer obj c0a109cc!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10a8c!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10b4c!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10c0c!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10ccc!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10d8c!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10e4c!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10f0c!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10fcc!
MT7620-->RTMP_TimerListAdd: add timer obj c0a1108c!
MT7620-->RTMP_TimerListAdd: add timer obj c0a1114c!
MT7620-->RTMP_TimerListAdd: add timer obj c0a1120c!
MT7620-->RTMP_TimerListAdd: add timer obj c0a112cc!
MT7620-->RTMP_TimerListAdd: add timer obj c0a1138c!
MT7620-->RTMP_TimerListAdd: add timer obj c0a0dfe0!
MT7620-->RTMP_TimerListAdd: add timer obj c0a108a4!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10964!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10a24!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10ae4!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10ba4!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10c64!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10d24!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10de4!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10ea4!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10f64!
MT7620-->RTMP_TimerListAdd: add timer obj c0a11024!
MT7620-->RTMP_TimerListAdd: add timer obj c0a110e4!
MT7620-->RTMP_TimerListAdd: add timer obj c0a111a4!
MT7620-->RTMP_TimerListAdd: add timer obj c0a11264!
MT7620-->RTMP_TimerListAdd: add timer obj c0a11324!
MT7620-->RTMP_TimerListAdd: add timer obj c0a113e4!
MT7620-->RTMP_TimerListAdd: add timer obj c09b51a8!
MT7620-->RTMP_TimerListAdd: add timer obj c09b4d9c!
MT7620-->RTMP_TimerListAdd: add timer obj c09b5178!
MT7620-->RTMP_TimerListAdd: add timer obj c09b5510!
MT7620-->RTMP_TimerListAdd: add timer obj c09b5270!
MT7620-->RTMP_TimerListAdd: add timer obj c09b52a0!
MT7620-->RTMP_TimerListAdd: add timer obj c09b5450!
MT7620-->RTMP_TimerListAdd: add timer obj c09b5480!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10440!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10034!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10410!
MT7620-->RTMP_TimerListAdd: add timer obj c0a107a8!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10508!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10538!
MT7620-->RTMP_TimerListAdd: add timer obj c0a10470!
MT7620-->RTMP_TimerListAdd: add timer obj c0a104a0!
MT7620-->RTMP_TimerListAdd: add timer obj c0a104d0!
MT7620-->RTMP_TimerListAdd: add timer obj c0a22f94!
MT7620-->RTMP_TimerListAdd: add timer obj c0a230b0!
MT7620-->RTMP_TimerListAdd: add timer obj c0a22fc0!
MT7620-->RTMP_TimerListAdd: add timer obj c0a1256c!
MT7620-->RTMP_TimerListAdd: add timer obj c09b2668!
MT7620-->RTMP_TimerListAdd: add timer obj c0a1227c!
MT7620-->CountryRegion=1
MT7620-->CountryRegionABand=7
MT7620-->APSDCapable[0]=0
MT7620-->APSDCapable[1]=0
MT7620-->APSDCapable[2]=0
MT7620-->APSDCapable[3]=0
MT7620-->APSDCapable[4]=0
MT7620-->APSDCapable[5]=0
MT7620-->APSDCapable[6]=0
MT7620-->APSDCapable[7]=0
MT7620-->APSDCapable[8]=0
MT7620-->APSDCapable[9]=0
MT7620-->APSDCapable[10]=0
MT7620-->APSDCapable[11]=0
MT7620-->APSDCapable[12]=0
MT7620-->APSDCapable[13]=0
MT7620-->APSDCapable[14]=0
MT7620-->APSDCapable[15]=0
MT7620-->default ApCliAPSDCapable[0]=0
MT7620-->Key1Str is Invalid key length(0) or Type(0)
MT7620-->Key2Str is Invalid key length(0) or Type(0)
MT7620-->Key3Str is Invalid key length(0) or Type(0)
MT7620-->Key4Str is Invalid key length(0) or Type(0)
the country code is 1.
country region is GB.
--> success opening /etc/wireless/RT2860SingleSKU.dat
start ch = 1, ch->num = 13
28 28 28 28
28 28 28 28 28 28 28 28
28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28
28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28
MT7620-->1. Phy Mode = 9
MT7620-->2. Phy Mode = 9
MT7620-->E2PROM: D0 target power=0xfc20
MT7620-->E2PROM: 40 MW Power Delta= 0
MT7620-->3. Phy Mode = 9
MT7620-->RTMP_TimerListAdd: add timer obj c09b2264!
MT7620-->AntCfgInit: primary/secondary ant 0/1
MT7620-->Initialize RF Central Registers for E2 !!!
MT7620-->Initialize RF Central Registers for E3 !!!
MT7620-->Initialize RF Channel Registers for E2 !!!
MT7620-->Initialize RF Channel Registers for E3 !!!
MT7620-->Initialize RF DCCal Registers for E2 !!!
MT7620-->Initialize RF DCCal Registers for E3 !!!
MT7620-->D1 = -3, D2 = 2, CalCode = 12 !!!
MT7620-->RT6352_Temperature_Init : BBPR49 = 0xfffffffd
MT7620-->RT6352_Temperature_Init : TemperatureRef25C = 0xfffffff3
MT7620-->Current Temperature from BBP_R49=0xfffffff7
MT7620-->RT6352_TssiTableAdjust: upper_bound = 0x7F decimal: 127
MT7620-->RT6352_TssiTableAdjust: lower_bound = 0xFFFFFF80 decimal: -128
MT7620-->*** RT6352_TssiTableAdjust: G Tssi[-7 .. +7] = -128 -128 -128 -128 -128 -25 -12
- 0 - 12 28 127 127 127 127 127, offset=-13, tuning=1
MT7620-->RT6352_TssiTableAdjust: G Tssi[-7 .. +7] = -128 -128 -128 -128 -128 -38 -25 - -13 - -1 15 114 114 114 114 114, offset=-13, tuning=1
MT7620-->mp_temperature=0xfffffffc, step = +0
MT7620-->E2PROM: G Tssi[-7 .. +7] = -128 -128 -128 -128 -128 -38 -25 - -13 - -1 15 114 114 114 114 114, offset=-13, tuning=1
MT7620--> TX BW Filter Calibration !!!
MT7620--> RX BW Filter Calibration !!!
MT7620-->LOFT Calibration Done!
MT7620-->IQCalibration Start!
MT7620-->IQCalibration Done! CH = 0, (gain= 2, phase=3f)
MT7620-->IQCalibration Start!
MT7620-->IQCalibration Done! CH = 1, (gain= 0, phase=3d)
MT7620-->TX IQ Calibration Done!
MT7620-->Change as Normal Mode(0x8371d)
MT7620-->After Change, now GPIO_MODE value is 0x8371d
MT7620-->RT6352_Init_ExtPA_ExtLNA: Enable Ext-LNA.
MT7620-->RT6352_Init_ExtPA_ExtLNA: Init Ext-LNA BBP.
MT7620-->internal ALC is not enabled in NVM !
MT7620-->bAutoTxAgcG = 1
MT7620-->MCS Set = ff ff 00 00 01
MT7620-->SYNC - BBP R4 to 20MHz.l
MT7620-->SYNC - BBP R4 to 20MHz.l
MT7620-->SYNC - BBP R4 to 20MHz.l
MT7620-->SYNC - BBP R4 to 20MHz.l
MT7620-->SYNC - BBP R4 to 20MHz.l
MT7620-->SYNC - BBP R4 to 20MHz.l
MT7620-->SYNC - BBP R4 to 20MHz.l
MT7620-->SYNC - BBP R4 to 20MHz.l
MT7620-->SYNC - BBP R4 to 20MHz.l
MT7620-->SYNC - BBP R4 to 20MHz.l
MT7620-->RTMP_TimerListAdd: add timer obj c0a12854!
MT7620-->@@@ ed_monitor_init : ===>
MT7620-->@@@ ed_monitor_init : <===
MT7620-->Main bssid = c4:6e:1f:a0:4d:e0
<==== rt28xx_init, Status=0
0x1300 = 00064300
MT7620-->@@@ APPeerBeaconAction : BssChannelAPCount=2, ed_ap_threshold=1, go to ed_monitor_exit()!!
MT7620-->@@@ ed_monitor_exit : ===>
MT7620-->@@@ ed_monitor_exit : <===
MT7620-->@@@ ed_monitor_init : ===>
MT7620-->@@@ ed_monitor_init : <===
MT7620-->@@@ APStop: go to ed_monitor_exit()!!
MT7620-->@@@ ed_monitor_exit : ===>
MT7620-->@@@ ed_monitor_exit : <===
MT7620-->@@@ ed_monitor_init : ===>
MT7620-->@@@ ed_monitor_init : <===
MT7620-->@@@ ed_status_read: pAd->false_cca_stat[3]=237, pAd->false_cca_threshold=180 !!
MT7620-->@@@ ed_status_read: go to ed_monitor_exit()!!
MT7620-->@@@ ed_monitor_exit : ===>
MT7620-->@@@ ed_monitor_exit : <===
device ra0 entered promiscuous mode
br0: port 2(ra0) entering forwarding state
br0: port 2(ra0) entering forwarding state
MT7620-->@@@ ed_monitor_init : ===>
MT7620-->@@@ ed_monitor_init : <===
device apcli0 entered promiscuous mode
br0: port 3(apcli0) entering forwarding state
br0: port 3(apcli0) entering forwarding state
load fw spent 16ms
MT7610-->RX DESC a245b000 size = 2048
MT7610-->RX1 DESC a2468000 size = 2048
MT7610-->RTMP_TimerListAdd: add timer obj c10a7ed4!
MT7610-->RTMP_TimerListAdd: add timer obj c106814c!
MT7610-->RTMP_TimerListAdd: add timer obj c106a928!
MT7610-->RTMP_TimerListAdd: add timer obj c106a9bc!
MT7610-->RTMP_TimerListAdd: add timer obj c106aa50!
MT7610-->RTMP_TimerListAdd: add timer obj c106aae4!
MT7610-->RTMP_TimerListAdd: add timer obj c106ab78!
MT7610-->RTMP_TimerListAdd: add timer obj c106ac0c!
MT7610-->RTMP_TimerListAdd: add timer obj c106aca0!
MT7610-->RTMP_TimerListAdd: add timer obj c106ad34!
MT7610-->RTMP_TimerListAdd: add timer obj c106adc8!
MT7610-->RTMP_TimerListAdd: add timer obj c106ae5c!
MT7610-->RTMP_TimerListAdd: add timer obj c106aef0!
MT7610-->RTMP_TimerListAdd: add timer obj c106af84!
MT7610-->RTMP_TimerListAdd: add timer obj c106b018!
MT7610-->RTMP_TimerListAdd: add timer obj c106b0ac!
MT7610-->RTMP_TimerListAdd: add timer obj c106b140!
MT7610-->RTMP_TimerListAdd: add timer obj c106b1d4!
MT7610-->RTMP_TimerListAdd: add timer obj c1068120!
MT7610-->RTMP_TimerListAdd: add timer obj c106a8fc!
MT7610-->RTMP_TimerListAdd: add timer obj c106a990!
MT7610-->RTMP_TimerListAdd: add timer obj c106aa24!
MT7610-->RTMP_TimerListAdd: add timer obj c106aab8!
MT7610-->RTMP_TimerListAdd: add timer obj c106ab4c!
MT7610-->RTMP_TimerListAdd: add timer obj c106abe0!
MT7610-->RTMP_TimerListAdd: add timer obj c106ac74!
MT7610-->RTMP_TimerListAdd: add timer obj c106ad08!
MT7610-->RTMP_TimerListAdd: add timer obj c106ad9c!
MT7610-->RTMP_TimerListAdd: add timer obj c106ae30!
MT7610-->RTMP_TimerListAdd: add timer obj c106aec4!
MT7610-->RTMP_TimerListAdd: add timer obj c106af58!
MT7610-->RTMP_TimerListAdd: add timer obj c106afec!
MT7610-->RTMP_TimerListAdd: add timer obj c106b080!
MT7610-->RTMP_TimerListAdd: add timer obj c106b114!
MT7610-->RTMP_TimerListAdd: add timer obj c106b1a8!
MT7610-->RTMP_TimerListAdd: add timer obj c10680f4!
MT7610-->RTMP_TimerListAdd: add timer obj c100eaf4!
MT7610-->RTMP_TimerListAdd: add timer obj c100e6e8!
MT7610-->RTMP_TimerListAdd: add timer obj c100eac4!
MT7610-->RTMP_TimerListAdd: add timer obj c100edf0!
MT7610-->RTMP_TimerListAdd: add timer obj c100ed30!
MT7610-->RTMP_TimerListAdd: add timer obj c1011cf8!
MT7610-->RTMP_TimerListAdd: add timer obj c10118ec!
MT7610-->RTMP_TimerListAdd: add timer obj c1011cc8!
MT7610-->RTMP_TimerListAdd: add timer obj c1011ff4!
MT7610-->RTMP_TimerListAdd: add timer obj c1011f34!
MT7610-->RTMP_TimerListAdd: add timer obj c1014efc!
MT7610-->RTMP_TimerListAdd: add timer obj c1014af0!
MT7610-->RTMP_TimerListAdd: add timer obj c1014ecc!
MT7610-->RTMP_TimerListAdd: add timer obj c10151f8!
MT7610-->RTMP_TimerListAdd: add timer obj c1015138!
MT7610-->RTMP_TimerListAdd: add timer obj c1018100!
MT7610-->RTMP_TimerListAdd: add timer obj c1017cf4!
MT7610-->RTMP_TimerListAdd: add timer obj c10180d0!
MT7610-->RTMP_TimerListAdd: add timer obj c10183fc!
MT7610-->RTMP_TimerListAdd: add timer obj c101833c!
MT7610-->RTMP_TimerListAdd: add timer obj c101b304!
MT7610-->RTMP_TimerListAdd: add timer obj c101aef8!
MT7610-->RTMP_TimerListAdd: add timer obj c101b2d4!
MT7610-->RTMP_TimerListAdd: add timer obj c101b600!
MT7610-->RTMP_TimerListAdd: add timer obj c101b540!
MT7610-->RTMP_TimerListAdd: add timer obj c101e508!
MT7610-->RTMP_TimerListAdd: add timer obj c101e0fc!
MT7610-->RTMP_TimerListAdd: add timer obj c101e4d8!
MT7610-->RTMP_TimerListAdd: add timer obj c101e804!
MT7610-->RTMP_TimerListAdd: add timer obj c101e744!
MT7610-->RTMP_TimerListAdd: add timer obj c102170c!
MT7610-->RTMP_TimerListAdd: add timer obj c1021300!
MT7610-->RTMP_TimerListAdd: add timer obj c10216dc!
MT7610-->RTMP_TimerListAdd: add timer obj c1021a08!
MT7610-->RTMP_TimerListAdd: add timer obj c1021948!
MT7610-->RTMP_TimerListAdd: add timer obj c1024910!
MT7610-->RTMP_TimerListAdd: add timer obj c1024504!
MT7610-->RTMP_TimerListAdd: add timer obj c10248e0!
MT7610-->RTMP_TimerListAdd: add timer obj c1024c0c!
MT7610-->RTMP_TimerListAdd: add timer obj c1024b4c!
MT7610-->RTMP_TimerListAdd: add timer obj c106a554!
MT7610-->RTMP_TimerListAdd: add timer obj c106a148!
MT7610-->RTMP_TimerListAdd: add timer obj c106a524!
MT7610-->RTMP_TimerListAdd: add timer obj c106a850!
MT7610-->RTMP_TimerListAdd: add timer obj c106a584!
MT7610-->RTMP_TimerListAdd: add timer obj c106a5b4!
MT7610-->RTMP_TimerListAdd: add timer obj c106a5e4!
MT7610-->RTMP_TimerListAdd: add timer obj c107de2c!
MT7610-->RTMP_TimerListAdd: add timer obj c107df48!
MT7610-->RTMP_TimerListAdd: add timer obj c107de58!
MT7610-->RTMP_TimerListAdd: add timer obj c106c35c!
MT7610-->RTMP_TimerListAdd: add timer obj c100bfb4!
MT7610-->RTMP_TimerListAdd: add timer obj c100f1b8!
MT7610-->RTMP_TimerListAdd: add timer obj c10123bc!
MT7610-->RTMP_TimerListAdd: add timer obj c10155c0!
MT7610-->RTMP_TimerListAdd: add timer obj c10187c4!
MT7610-->RTMP_TimerListAdd: add timer obj c101b9c8!
MT7610-->RTMP_TimerListAdd: add timer obj c101ebcc!
MT7610-->RTMP_TimerListAdd: add timer obj c1021dd0!
MT7610-->RTMP_TimerListAdd: add timer obj c106c068!
MT7610-->cfg_mode=14
MT7610-->cfg_mode=14
MT7610-->wmode_band_equal(): Band Not Equal!
MT7610-->APSDCapable[0]=0
MT7610-->APSDCapable[1]=0
MT7610-->APSDCapable[2]=0
MT7610-->APSDCapable[3]=0
MT7610-->APSDCapable[4]=0
MT7610-->APSDCapable[5]=0
MT7610-->APSDCapable[6]=0
MT7610-->APSDCapable[7]=0
MT7610-->APSDCapable[8]=0
MT7610-->APSDCapable[9]=0
MT7610-->APSDCapable[10]=0
MT7610-->APSDCapable[11]=0
MT7610-->APSDCapable[12]=0
MT7610-->APSDCapable[13]=0
MT7610-->APSDCapable[14]=0
MT7610-->APSDCapable[15]=0
MT7610-->default ApCliAPSDCapable[0]=0
MT7610-->Key1Str is Invalid key length(0) or Type(0)
MT7610-->Key2Str is Invalid key length(0) or Type(0)
MT7610-->Key3Str is Invalid key length(0) or Type(0)
MT7610-->Key4Str is Invalid key length(0) or Type(0)
the country code is 5.
country region is GB.
--> success opening /etc/Wireless/iNIC/SingleSKU_5G.dat
start ch = 36, ch->num = 1
0 0 0 0
38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38
start ch = 38, ch->num = 1
0 0 0 0
38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38
start ch = 40, ch->num = 1
0 0 0 0
38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38
start ch = 42, ch->num = 1
0 0 0 0
38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38
start ch = 44, ch->num = 1
0 0 0 0
38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38
start ch = 46, ch->num = 1
0 0 0 0
38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38
start ch = 48, ch->num = 1
0 0 0 0
38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38
start ch = 52, ch->num = 1
0 0 0 0
38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38
start ch = 54, ch->num = 1
0 0 0 0
38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38
start ch = 56, ch->num = 1
0 0 0 0
38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38
start ch = 58, ch->num = 1
0 0 0 0
38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38
start ch = 60, ch->num = 1
0 0 0 0
38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38
start ch = 62, ch->num = 1
0 0 0 0
38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38
start ch = 64, ch->num = 1
0 0 0 0
38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
38 38 38 38 38 38 38 38 38 38
start ch = 100, ch->num = 1
0 0 0 0
52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52
start ch = 102, ch->num = 1
0 0 0 0
52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52
start ch = 104, ch->num = 1
0 0 0 0
52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52
start ch = 106, ch->num = 1
0 0 0 0
52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52
start ch = 108, ch->num = 1
0 0 0 0
52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52
start ch = 110, ch->num = 1
0 0 0 0
52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52
start ch = 112, ch->num = 1
0 0 0 0
52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52
start ch = 114, ch->num = 1
0 0 0 0
52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52
start ch = 116, ch->num = 1
0 0 0 0
52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52
start ch = 118, ch->num = 1
0 0 0 0
52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52
start ch = 120, ch->num = 1
0 0 0 0
52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52
start ch = 122, ch->num = 1
0 0 0 0
52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52
start ch = 124, ch->num = 1
0 0 0 0
52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52
start ch = 126, ch->num = 1
0 0 0 0
52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52
start ch = 128, ch->num = 1
0 0 0 0
52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52
start ch = 130, ch->num = 1
0 0 0 0
52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52
start ch = 132, ch->num = 1
0 0 0 0
52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52
start ch = 134, ch->num = 1
0 0 0 0
52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52
start ch = 136, ch->num = 1
0 0 0 0
52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52
start ch = 149, ch->num = 1
0 0 0 0
52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52
start ch = 151, ch->num = 1
0 0 0 0
52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52
start ch = 153, ch->num = 1
0 0 0 0
52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52
start ch = 155, ch->num = 1
0 0 0 0
52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52
start ch = 157, ch->num = 1
0 0 0 0
52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52
start ch = 159, ch->num = 1
0 0 0 0
52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52
start ch = 161, ch->num = 1
0 0 0 0
52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52
start ch = 163, ch->num = 1
0 0 0 0
52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52
start ch = 165, ch->num = 1
0 0 0 0
52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52
52 52 52 52 52 52 52 52 52 52
MT7610-->1. Phy Mode = 49
MT7610-->2. Phy Mode = 49
MT7610-->ext_pa_current_setting = 1
MT7610-->MT76x0_TssiTableAdjust: upper_bound = 0x7F decimal: 127
MT7610-->MT76x0_TssiTableAdjust: lower_bound = 0xFFFFFF80 decimal: -128
MT7610-->*** MT76x0_TssiTableAdjust: A Tssi[-7 .. +7] = -128 -128 -128 -128 -14 -8 -4 * 0 * 3 14 16 127 127 127 127, offset=-4, tuning=1
MT7610-->MT76x0_TssiTableAdjust: A Tssi[-7 .. +7] = -128 -128 -128 -128 -18 -12 -8 * -4 * -1 10 12 123 123 123 123, offset=-4, tuning=1
MT7610-->mp_temperature=0xfffffffc, step = +0
MT7610-->MT76x0_TssiTableAdjust: upper_bound = 0x7F decimal: 127
MT7610-->MT76x0_TssiTableAdjust: lower_bound = 0xFFFFFF80 decimal: -128
MT7610-->*** MT76x0_TssiTableAdjust: A Tssi[-7 .. +7] = -128 -128 -128 -128 -18 -11 -6 * -4 * 4 15 20 127 127 127 127, offset=-4, tuning=1
MT7610-->MT76x0_TssiTableAdjust: A Tssi[-7 .. +7] = -128 -128 -128 -128 -22 -15 -10 * -4 * 0 11 16 123 123 123 123, offset=-4, tuning=1
MT7610-->mp_temperature=0xfffffffc, step = +0
MT7610-->3. Phy Mode = 49
MT7610-->AntCfgInit: primary/secondary ant 0/1
MT7610-->ChipStructAssign(): RALINK6590 hook !
MT7610-->bAutoTxAgcG = 1
MT7610-->RTMPSetPhyMode: channel is out of range, use first channel=36
MT7610-->MCS Set = ff 00 00 00 01
MT7610-->RTMP_TimerListAdd: add timer obj c10756e8!
MT7610-->MT76x0_ChipBBPAdjust():rf_bw=2, ext_ch=1, PrimCh=36, HT-CentCh=38, VHT-CentCh=42
MT7610-->APStartUp(): AP Set CentralFreq at 42(Prim=36, HT-CentCh=38, VHT-CentCh=42, BBP_BW=2)
MT7610-->Main bssid = c4:6e:1f:a0:4d:e2
----->R66:0x3e<==== rt28xx_init, Status=0
0x1300 = 00064300
MT7610-->RTMPDrvOpen(1):Check if PDMA is idle!
MT7610-->RTMPDrvOpen(2):Check if PDMA is idle!
MT7610-->cfg_mode=14
MT7610-->wmode_band_equal(): Band Equal!
MT7610-->MT76x0_ChipBBPAdjust():rf_bw=2, ext_ch=3, PrimCh=40, HT-CentCh=38, VHT-CentCh=42
MT7610-->APStartUp(): AP Set CentralFreq at 42(Prim=40, HT-CentCh=38, VHT-CentCh=42, BBP_BW=2)
MT7610-->MT76x0_ChipBBPAdjust():rf_bw=2, ext_ch=3, PrimCh=40, HT-CentCh=38, VHT-CentCh=42
MT7610-->APStartUp(): AP Set CentralFreq at 42(Prim=40, HT-CentCh=38, VHT-CentCh=42, BBP_BW=2)
device rai0 entered promiscuous mode
br0: port 4(rai0) entering forwarding state
br0: port 4(rai0) entering forwarding state
MT7610-->MT76x0_ChipBBPAdjust():rf_bw=2, ext_ch=3, PrimCh=40, HT-CentCh=38, VHT-CentCh=42
MT7610-->APStartUp(): AP Set CentralFreq at 42(Prim=40, HT-CentCh=38, VHT-CentCh=42, BBP_BW=2)
device apclii0 entered promiscuous mode
br0: port 5(apclii0) entering forwarding state
br0: port 5(apclii0) entering forwarding state
MT7620-->@@@ ed_status_read: pAd->false_cca_stat[7]=186, pAd->false_cca_threshold=180 !!
MT7620-->@@@ ed_status_read: go to ed_monitor_exit()!!
MT7620-->@@@ ed_monitor_exit : ===>
MT7620-->@@@ ed_monitor_exit : <===
br0: port 5(apclii0) entering forwarding state
br0: port 4(rai0) entering forwarding state
br0: port 3(apcli0) entering forwarding state
br0: port 2(ra0) entering forwarding state
br0: port 1(eth2.1) entering forwarding state
br0: port 5(apclii0) entering forwarding state
br0: port 5(apclii0) entering forwarding state
br0: port 4(rai0) entering forwarding state
br0: port 4(rai0) entering forwarding state
br0: port 3(apcli0) entering forwarding state
br0: port 3(apcli0) entering forwarding state
br0: port 2(ra0) entering forwarding state
br0: port 2(ra0) entering forwarding state
br0: port 1(eth2.1) entering forwarding state
br0: port 1(eth2.1) entering forwarding state
MT7610-->MT76x0_TempSensor - Dout=-2 (0xfffffffe), TemperatureOffset = -32644 (0xffff807c), temperature = -16800 (0xffffbe60)Console login: Login root password sohoadmin
Bootloader options:
Press 4 to break loading.
U-Boot 1.1.3 (Aug 19 2014 - 17:43:44)
Board: Ralink APSoC DRAM: 64 MB
relocate_code Pointer at: 83fb4000
enable ephy clock...done. rf reg 29 = 5
SSC disabled.
spi_wait_nsec: 29
spi device id: 1c 30 17 1c 30 (30171c30)
find flash: EN25Q64
============================================
Ralink UBoot Version: 4.1.0.0
This UBoot has been rewritten by TPLINK *_*
--------------------------------------------
ASIC 7620_MP (Port5<->None)
DRAM component: 512 Mbits DDR, width 16
DRAM bus: 16 bit
Total memory: 64 MBytes
Flash component: SPI Flash
Date:Aug 19 2014 Time:17:43:44
============================================
icache: sets:512, ways:4, linesz:32 ,total:65536
dcache: sets:256, ways:4, linesz:32 ,total:32768
##### The CPU freq = 580 MHZ ####
estimate memory size =64 Mbytes
Please choose the operation:
1: Load system code to SDRAM via TFTP.
2: Load system code then write to Flash via TFTP.
3: Boot system code via Flash (default).
4: Entr boot command line interface.
6: Load ART data then write to Flash via TFTP.
7: Load Boot Loader code then write to Flash via Serial.
9: Load Boot Loader code then write to Flash via TFTP.
You choosed 4
0
raspi_read: from:20028 len:6
4: System Enter Boot Command Line Interface.
U-Boot 1.1.3 (Aug 19 2014 - 17:43:44)
MT7620 # ?
? - alias for 'help'
bootm - boot application image from memory
cp - memory copy(add cp.b by HouXB)
erase - erase SPI FLASH memory
go - start application at address 'addr'
help - print online help
loadb - load binary file over serial line (kermit mode)
md - memory display
mdio - Ralink PHY register R/W command !!
mm - memory modify (auto-incrementing)
nm - memory modify (constant address)
printenv- print environment variables
reset - Perform RESET of the CPU
rf - read/write rf register
saveenv - save environment variables to persistent storage
setenv - set environment variables
tftpboot- boot image via network using TFTP protocol
version - print monitor version
MT7620 # printenv
bootcmd=tftp
bootdelay=1
baudrate=57600
ethaddr="00:AA:BB:CC:DD:10"
ipaddr=192.168.0.254
serverip=192.168.0.10
stdin=serial
stdout=serial
stderr=serial
Environment size: 152/4092 bytes
MT7620 #i trying firmware to C20i form: http://downloads.openwrt.org/snapshots/ … ps/mt7620/
Log from flashing:
U-Boot 1.1.3 (Oct 20 2014 - 14:08:15)
Board: Ralink APSoC DRAM: 64 MB
relocate_code Pointer at: 83fb4000
enable ephy clock...done. rf reg 29 = 5
SSC disabled.
******************************
Software System Reset Occurred
******************************
spi_wait_nsec: 29
spi device id: 1c 30 17 1c 30 (30171c30)
find flash: EN25Q64
============================================
Ralink UBoot Version: 4.1.0.0
This UBoot has been rewritten by TPLINK *_*
--------------------------------------------
ASIC 7620_MP (Port5<->None)
DRAM component: 512 Mbits DDR, width 16
DRAM bus: 16 bit
Total memory: 64 MBytes
Flash component: SPI Flash
Date:Oct 20 2014 Time:14:08:15
============================================
icache: sets:512, ways:4, linesz:32 ,total:65536
dcache: sets:256, ways:4, linesz:32 ,total:32768
##### The CPU freq = 580 MHZ ####
estimate memory size =64 Mbytes
Please choose the operation:
1: Load system code to SDRAM via TFTP.
2: Load system code then write to Flash via TFTP.
3: Boot system code via Flash (default).
4: Entr boot command line interface.
6: Load ART data then write to Flash via TFTP.
7: Load Boot Loader code then write to Flash via Serial.
9: Load Boot Loader code then write to Flash via TFTP.
You choosed 2
0
raspi_read: from:20028 len:6
2: System Load Linux Kernel then write to Flash via TFTP.
Warning!! Erase Linux in Flash then burn new one. Are you sure?(Y/N)
Please Input new ones /or Ctrl-C to discard
Input device IP (192.168.0.254) ==:192.168.0.254
Input server IP (192.168.0.10) ==:192.168.0.10
Input Linux Kernel filename () ==:code.bin
netboot_common, argc= 3
NetTxPacket = 0x83FE5AC0
KSEG1ADDR(NetTxPacket) = 0xA3FE5AC0
NetLoop,call eth_halt !
NetLoop,call eth_init !
Trying Eth0 (10/100-M)
Waitting for RX_DMA_BUSY status Start... done
ETH_STATE_ACTIVE!!
TFTP from server 192.168.0.10; our IP address is 192.168.0.254
Filename 'code.bin'.
TIMEOUT_COUNT=10,Load address: 0x80100000
Loading: Got ARP REPLY, set server/gtwy eth addr (d8:97:ba:0d:83:60)
Got it
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##
done
Bytes transferred = 7995392 (7a0000 hex)
NetBootFileXferSize= 007a0000
raspi_erase_write: offs:20000, count:7a0000
raspi_erase: offs:20000 len:7a0000
..........................................................................................................................
raspi_write: to:20000 len:7a0000
..........................................................................................................................
raspi_read: from:20000 len:10000
raspi_read: from:30000 len:10000
raspi_read: from:40000 len:10000
raspi_read: from:50000 len:10000
raspi_read: from:60000 len:10000
raspi_read: from:70000 len:10000
raspi_read: from:80000 len:10000
raspi_read: from:90000 len:10000
raspi_read: from:a0000 len:10000
raspi_read: from:b0000 len:10000
raspi_read: from:c0000 len:10000
raspi_read: from:d0000 len:10000
raspi_read: from:e0000 len:10000
raspi_read: from:f0000 len:10000
raspi_read: from:100000 len:10000
raspi_read: from:110000 len:10000
raspi_read: from:120000 len:10000
raspi_read: from:130000 len:10000
raspi_read: from:140000 len:10000
raspi_read: from:150000 len:10000
raspi_read: from:160000 len:10000
raspi_read: from:170000 len:10000
raspi_read: from:180000 len:10000
raspi_read: from:190000 len:10000
raspi_read: from:1a0000 len:10000
raspi_read: from:1b0000 len:10000
raspi_read: from:1c0000 len:10000
raspi_read: from:1d0000 len:10000
raspi_read: from:1e0000 len:10000
raspi_read: from:1f0000 len:10000
raspi_read: from:200000 len:10000
raspi_read: from:210000 len:10000
raspi_read: from:220000 len:10000
raspi_read: from:230000 len:10000
raspi_read: from:240000 len:10000
raspi_read: from:250000 len:10000
raspi_read: from:260000 len:10000
raspi_read: from:270000 len:10000
raspi_read: from:280000 len:10000
raspi_read: from:290000 len:10000
raspi_read: from:2a0000 len:10000
raspi_read: from:2b0000 len:10000
raspi_read: from:2c0000 len:10000
raspi_read: from:2d0000 len:10000
raspi_read: from:2e0000 len:10000
raspi_read: from:2f0000 len:10000
raspi_read: from:300000 len:10000
raspi_read: from:310000 len:10000
raspi_read: from:320000 len:10000
raspi_read: from:330000 len:10000
raspi_read: from:340000 len:10000
raspi_read: from:350000 len:10000
raspi_read: from:360000 len:10000
raspi_read: from:370000 len:10000
raspi_read: from:380000 len:10000
raspi_read: from:390000 len:10000
raspi_read: from:3a0000 len:10000
raspi_read: from:3b0000 len:10000
raspi_read: from:3c0000 len:10000
raspi_read: from:3d0000 len:10000
raspi_read: from:3e0000 len:10000
raspi_read: from:3f0000 len:10000
raspi_read: from:400000 len:10000
raspi_read: from:410000 len:10000
raspi_read: from:420000 len:10000
raspi_read: from:430000 len:10000
raspi_read: from:440000 len:10000
raspi_read: from:450000 len:10000
raspi_read: from:460000 len:10000
raspi_read: from:470000 len:10000
raspi_read: from:480000 len:10000
raspi_read: from:490000 len:10000
raspi_read: from:4a0000 len:10000
raspi_read: from:4b0000 len:10000
raspi_read: from:4c0000 len:10000
raspi_read: from:4d0000 len:10000
raspi_read: from:4e0000 len:10000
raspi_read: from:4f0000 len:10000
raspi_read: from:500000 len:10000
raspi_read: from:510000 len:10000
raspi_read: from:520000 len:10000
raspi_read: from:530000 len:10000
raspi_read: from:540000 len:10000
raspi_read: from:550000 len:10000
raspi_read: from:560000 len:10000
raspi_read: from:570000 len:10000
raspi_read: from:580000 len:10000
raspi_read: from:590000 len:10000
raspi_read: from:5a0000 len:10000
raspi_read: from:5b0000 len:10000
raspi_read: from:5c0000 len:10000
raspi_read: from:5d0000 len:10000
raspi_read: from:5e0000 len:10000
raspi_read: from:5f0000 len:10000
raspi_read: from:600000 len:10000
raspi_read: from:610000 len:10000
raspi_read: from:620000 len:10000
raspi_read: from:630000 len:10000
raspi_read: from:640000 len:10000
raspi_read: from:650000 len:10000
raspi_read: from:660000 len:10000
raspi_read: from:670000 len:10000
raspi_read: from:680000 len:10000
raspi_read: from:690000 len:10000
raspi_read: from:6a0000 len:10000
raspi_read: from:6b0000 len:10000
raspi_read: from:6c0000 len:10000
raspi_read: from:6d0000 len:10000
raspi_read: from:6e0000 len:10000
raspi_read: from:6f0000 len:10000
raspi_read: from:700000 len:10000
raspi_read: from:710000 len:10000
raspi_read: from:720000 len:10000
raspi_read: from:730000 len:10000
raspi_read: from:740000 len:10000
raspi_read: from:750000 len:10000
raspi_read: from:760000 len:10000
raspi_read: from:770000 len:10000
raspi_read: from:780000 len:10000
raspi_read: from:790000 len:10000
raspi_read: from:7a0000 len:10000
raspi_read: from:7b0000 len:10000
Done!
## Booting image at bc020000 ...
Uncompressing Kernel Image ... OK
No initrd
## Transferring control to Linux (at address 09871200) ...
## Giving linux memsize in MB, 64
Starting kernel ...tftpserver: 192.168.1.100
MT7620 # tftpboot 0x82000000 image.bin
MT7620 # erase tplink 0x20000 0x7a0000
MT7620 # cp.b 0x82000000 0x20000 0x7a0000
MT7620 # bootmDo not use the erase linux command!
This not working on RE200 i use option 2 form bootloader.
Hello, someone has successfully installed mod firmware in archer c2?
I've got the TP-LINK 850 at home with the OpenWRT software on it and it simply rocks.
I'd like to get this running on my TP-LINK RE200 too since that has a support for the 5G band.
I'm really hoping someone can jump into this; I'd be more than willing to help.
Hello, someone has successfully installed mod firmware in archer c2?
I've built a c2 image with wlan (2,4 Ghz) and usb support. So i was able to add a usb <--> lan adaptor.
Original lan (Realtek rtl8367rb) not working :-/
@unsignedInt: good to hear!
The C20i is supposed to be very similar to the C2, and the C20i image is intended to work for both:
https://downloads.openwrt.org/chaos_cal … ps/mt7620/
Although, this router is not supported yet, of course.
Did you try/fail that image?
Your image, did you install via web-gui of OEM-firmware? Or did it require soldering and serial adapter?
My c2 image based on the c20i snapshot trunk (fork @ may 2015).
Wlan (2,4 Ghz) works out of the box, i added usb support and make own c2 router files (dts, etc...).
My init flash was with tftp... now i can update my machine via sysupgrade ...
I'm working currently on rtl8367rb (gmac support).
For those who may be less technical and are looking for a straight answer: No, the TP-Linux Archer C2/AC750 is NOT supported by OpenWRT at this time, and may never be supported.
The current version of hardware on this device uses a MediaTek chipset, and MediaTek is very Linux/GPL hostile.
Some people have gotten the basic bootloader to work, but the built-in ethernet switch and 5Ghz 802.11 wireless is not working, which makes the device pretty useless. Since we (the community) don't have specifications on this hardware, we probably won't ever be able to get it to fully work.
This might change in the future, if people can get the LAN switch and 5Ghz wireless working, but for now, the answer is no.
(Last edited by jmomo on 16 Jun 2015, 00:23)